KVM: x86: Make nanoseconds per APIC bus cycle a VM variable
authorIsaku Yamahata <isaku.yamahata@intel.com>
Thu, 25 Apr 2024 22:07:00 +0000 (15:07 -0700)
committerSean Christopherson <seanjc@google.com>
Wed, 5 Jun 2024 13:18:26 +0000 (06:18 -0700)
Introduce the VM variable "nanoseconds per APIC bus cycle" in
preparation to make the APIC bus frequency configurable.

The TDX architecture hard-codes the core crystal clock frequency to
25MHz and mandates exposing it via CPUID leaf 0x15. The TDX architecture
does not allow the VMM to override the value.

In addition, per Intel SDM:
    "The APIC timer frequency will be the processor’s bus clock or core
     crystal clock frequency (when TSC/core crystal clock ratio is
     enumerated in CPUID leaf 0x15) divided by the value specified in
     the divide configuration register."

The resulting 25MHz APIC bus frequency conflicts with the KVM hardcoded
APIC bus frequency of 1GHz.

Introduce the VM variable "nanoseconds per APIC bus cycle" to prepare
for allowing userspace to tell KVM to use the frequency that TDX mandates
instead of the default 1Ghz. Doing so ensures that the guest doesn't have
a conflicting view of the APIC bus frequency.

Signed-off-by: Isaku Yamahata <isaku.yamahata@intel.com>
Reviewed-by: Maxim Levitsky <mlevitsk@redhat.com>
Reviewed-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
[reinette: rework changelog]
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com>
Link: https://lore.kernel.org/r/ae75ce37c6c38bb4efd10a0a41932984c40b24ac.1714081726.git.reinette.chatre@intel.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
arch/x86/include/asm/kvm_host.h
arch/x86/kvm/hyperv.c
arch/x86/kvm/lapic.c
arch/x86/kvm/lapic.h
arch/x86/kvm/x86.c

index 64e84e9..a0d642a 100644 (file)
@@ -1364,6 +1364,7 @@ struct kvm_arch {
 
        u32 default_tsc_khz;
        bool user_set_tsc;
+       u64 apic_bus_cycle_ns;
 
        seqcount_raw_spinlock_t pvclock_sc;
        bool use_master_clock;
index 1030701..5c31e71 100644 (file)
@@ -1737,7 +1737,8 @@ static int kvm_hv_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata,
                data = (u64)vcpu->arch.virtual_tsc_khz * 1000;
                break;
        case HV_X64_MSR_APIC_FREQUENCY:
-               data = div64_u64(1000000000ULL, APIC_BUS_CYCLE_NS);
+               data = div64_u64(1000000000ULL,
+                                vcpu->kvm->arch.apic_bus_cycle_ns);
                break;
        default:
                kvm_pr_unimpl_rdmsr(vcpu, msr);
index ebf4102..6bfee3d 100644 (file)
@@ -1547,7 +1547,8 @@ static u32 apic_get_tmcct(struct kvm_lapic *apic)
                remaining = 0;
 
        ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period);
-       return div64_u64(ns, (APIC_BUS_CYCLE_NS * apic->divide_count));
+       return div64_u64(ns, (apic->vcpu->kvm->arch.apic_bus_cycle_ns *
+                             apic->divide_count));
 }
 
 static void __report_tpr_access(struct kvm_lapic *apic, bool write)
@@ -1965,7 +1966,8 @@ static void start_sw_tscdeadline(struct kvm_lapic *apic)
 
 static inline u64 tmict_to_ns(struct kvm_lapic *apic, u32 tmict)
 {
-       return (u64)tmict * APIC_BUS_CYCLE_NS * (u64)apic->divide_count;
+       return (u64)tmict * apic->vcpu->kvm->arch.apic_bus_cycle_ns *
+               (u64)apic->divide_count;
 }
 
 static void update_target_expiration(struct kvm_lapic *apic, uint32_t old_divisor)
index a20cb00..51e09f5 100644 (file)
@@ -16,7 +16,7 @@
 #define APIC_DEST_NOSHORT              0x0
 #define APIC_DEST_MASK                 0x800
 
-#define APIC_BUS_CYCLE_NS       1
+#define APIC_BUS_CYCLE_NS_DEFAULT      1
 
 #define APIC_BROADCAST                 0xFF
 #define X2APIC_BROADCAST               0xFFFFFFFFul
index 86a0c2d..9bdc841 100644 (file)
@@ -12622,6 +12622,7 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
        raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
 
        kvm->arch.default_tsc_khz = max_tsc_khz ? : tsc_khz;
+       kvm->arch.apic_bus_cycle_ns = APIC_BUS_CYCLE_NS_DEFAULT;
        kvm->arch.guest_can_read_msr_platform_info = true;
        kvm->arch.enable_pmu = enable_pmu;