clk: sunxi-ng: sun8i-de2: Add rotation core clocks and reset for A83T

A83T structures don't have clocks and reset for rotation core. Add them.

Fixes: 763c5bd045b1 ("clk: sunxi-ng: add support for DE2 CCU")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index bbbe1ed..9656553 100644 (file)
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -50,6 +50,8 @@ static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", "pll-de", 0x0c, 4, 4,
                   CLK_SET_RATE_PARENT);
 static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
                   CLK_SET_RATE_PARENT);
+static SUNXI_CCU_M(rot_div_a83_clk, "rot-div", "pll-de", 0x0c, 0x0c, 4,
+                  CLK_SET_RATE_PARENT);
 
 static struct ccu_common *sun8i_a83t_de2_clks[] = {
        &mixer0_clk.common,
@@ -63,6 +65,10 @@ static struct ccu_common *sun8i_a83t_de2_clks[] = {
        &mixer0_div_a83_clk.common,
        &mixer1_div_a83_clk.common,
        &wb_div_a83_clk.common,
+
+       &bus_rot_clk.common,
+       &rot_clk.common,
+       &rot_div_a83_clk.common,
 };
 
 static struct ccu_common *sun8i_h3_de2_clks[] = {
@@ -113,16 +119,19 @@ static struct clk_hw_onecell_data sun8i_a83t_de2_hw_clks = {
                [CLK_MIXER0]            = &mixer0_clk.common.hw,
                [CLK_MIXER1]            = &mixer1_clk.common.hw,
                [CLK_WB]                = &wb_clk.common.hw,
+               [CLK_ROT]               = &rot_clk.common.hw,
 
                [CLK_BUS_MIXER0]        = &bus_mixer0_clk.common.hw,
                [CLK_BUS_MIXER1]        = &bus_mixer1_clk.common.hw,
                [CLK_BUS_WB]            = &bus_wb_clk.common.hw,
+               [CLK_BUS_ROT]           = &bus_rot_clk.common.hw,
 
                [CLK_MIXER0_DIV]        = &mixer0_div_a83_clk.common.hw,
                [CLK_MIXER1_DIV]        = &mixer1_div_a83_clk.common.hw,
                [CLK_WB_DIV]            = &wb_div_a83_clk.common.hw,
+               [CLK_ROT_DIV]           = &rot_div_a83_clk.common.hw,
        },
-       .num    = CLK_NUMBER_WITHOUT_ROT,
+       .num    = CLK_NUMBER_WITH_ROT,
 };
 
 static struct clk_hw_onecell_data sun8i_h3_de2_hw_clks = {
@@ -183,6 +192,7 @@ static struct ccu_reset_map sun8i_a83t_de2_resets[] = {
         * exported here.
         */
        [RST_WB]        = { 0x08, BIT(2) },
+       [RST_ROT]       = { 0x08, BIT(3) },
 };
 
 static struct ccu_reset_map sun8i_h3_de2_resets[] = {