drm/amd/display: Remove useless assignments and variables
authorAlex Hung <alex.hung@amd.com>
Wed, 16 Oct 2024 18:18:39 +0000 (12:18 -0600)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 28 Oct 2024 20:36:13 +0000 (16:36 -0400)
[WHAT & HOW]
misc0, temp and split_pipe are assigned but immediately re-assigned
to other values. The early assignments are useless and are removed.
Unused variables are removed as well.

This fixes 5 UNUSED_VALUE issues reported by Coverity.

Reviewed-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
drivers/gpu/drm/amd/display/dc/dce/dce_stream_encoder.c
drivers/gpu/drm/amd/display/dc/dce110/dce110_mem_input_v.c
drivers/gpu/drm/amd/display/dc/dio/dcn10/dcn10_stream_encoder.c
drivers/gpu/drm/amd/display/dc/dio/dcn401/dcn401_dio_stream_encoder.c

index f0417ee..f90fc15 100644 (file)
@@ -1013,7 +1013,6 @@ static bool dc_can_pipe_disable_cursor(struct pipe_ctx *pipe_ctx)
                r2 = test_pipe->plane_res.scl_data.recout;
                r2_r = r2.x + r2.width;
                r2_b = r2.y + r2.height;
-               split_pipe = test_pipe;
 
                /**
                 * There is another half plane on same layer because of
index 5c2825b..d199e4e 100644 (file)
@@ -277,7 +277,6 @@ static void dce110_stream_encoder_dp_set_stream_attribute(
        uint32_t misc1 = 0;
        uint32_t h_blank;
        uint32_t h_back_porch;
-       uint8_t synchronous_clock = 0; /* asynchronous mode */
        uint8_t colorimetry_bpc;
        uint8_t dynamic_range_rgb = 0; /*full range*/
        uint8_t dynamic_range_ycbcr = 1; /*bt709*/
@@ -380,7 +379,6 @@ static void dce110_stream_encoder_dp_set_stream_attribute(
                break;
        }
 
-       misc0 = misc0 | synchronous_clock;
        misc0 = colorimetry_bpc << 5;
 
        if (REG(DP_MSA_TIMING_PARAM1)) {
index db7557a..8a3fbf9 100644 (file)
@@ -76,7 +76,6 @@ UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C__GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C_MAS
                mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_C,
                value);
 
-       temp = 0;
        value = 0;
        temp = address.low_part >>
        UNP_GRPH_PRIMARY_SURFACE_ADDRESS_C__GRPH_PRIMARY_SURFACE_ADDRESS_C__SHIFT;
@@ -112,7 +111,6 @@ UNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L__GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L_MAS
                mmUNP_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH_L,
                value);
 
-       temp = 0;
        value = 0;
        temp = address.low_part >>
        UNP_GRPH_PRIMARY_SURFACE_ADDRESS_L__GRPH_PRIMARY_SURFACE_ADDRESS_L__SHIFT;
index f496e95..d01a8b8 100644 (file)
@@ -255,7 +255,6 @@ void enc1_stream_encoder_dp_set_stream_attribute(
        uint32_t misc1 = 0;
        uint32_t h_blank;
        uint32_t h_back_porch;
-       uint8_t synchronous_clock = 0; /* asynchronous mode */
        uint8_t colorimetry_bpc;
        uint8_t dp_pixel_encoding = 0;
        uint8_t dp_component_depth = 0;
@@ -362,7 +361,6 @@ void enc1_stream_encoder_dp_set_stream_attribute(
                break;
        }
 
-       misc0 = misc0 | synchronous_clock;
        misc0 = colorimetry_bpc << 5;
 
        switch (output_color_space) {
index 0a27e09..098c2a0 100644 (file)
@@ -447,7 +447,6 @@ void enc401_stream_encoder_dp_set_stream_attribute(
        uint32_t misc1 = 0;
        uint32_t h_blank;
        uint32_t h_back_porch;
-       uint8_t synchronous_clock = 0; /* asynchronous mode */
        uint8_t colorimetry_bpc;
        uint8_t dp_pixel_encoding = 0;
        uint8_t dp_component_depth = 0;
@@ -603,7 +602,6 @@ void enc401_stream_encoder_dp_set_stream_attribute(
                break;
        }
 
-       misc0 = misc0 | synchronous_clock;
        misc0 = colorimetry_bpc << 5;
 
        switch (output_color_space) {