drm/amdgpu: Retire query_utcl2_poison_status callback
authorHawking Zhang <Hawking.Zhang@amd.com>
Mon, 19 Aug 2024 14:59:19 +0000 (22:59 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 23 Aug 2024 14:53:16 +0000 (10:53 -0400)
Driver switches to interrupt source id to identify
utcl2 poison event. polling interface is not needed.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
drivers/gpu/drm/amd/amdgpu/amdgpu_gfxhub.h
drivers/gpu/drm/amd/amdgpu/amdgpu_mmhub.h
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_0.c
drivers/gpu/drm/amd/amdgpu/gfxhub_v1_2.c
drivers/gpu/drm/amd/amdgpu/mmhub_v1_8.c

index 64a989c..4f08b15 100644 (file)
@@ -783,22 +783,6 @@ int amdgpu_amdkfd_send_close_event_drain_irq(struct amdgpu_device *adev,
        return 0;
 }
 
-bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev,
-                       int hub_inst, int hub_type)
-{
-       if (!hub_type) {
-               if (adev->gfxhub.funcs->query_utcl2_poison_status)
-                       return adev->gfxhub.funcs->query_utcl2_poison_status(adev, hub_inst);
-               else
-                       return false;
-       } else {
-               if (adev->mmhub.funcs->query_utcl2_poison_status)
-                       return adev->mmhub.funcs->query_utcl2_poison_status(adev, hub_inst);
-               else
-                       return false;
-       }
-}
-
 int amdgpu_amdkfd_check_and_lock_kfd(struct amdgpu_device *adev)
 {
        return kgd2kfd_check_and_lock_kfd();
index 825c7ff..f9d1194 100644 (file)
@@ -350,8 +350,6 @@ bool amdgpu_amdkfd_is_fed(struct amdgpu_device *adev);
 bool amdgpu_amdkfd_bo_mapped_to_dev(void *drm_priv, struct kgd_mem *mem);
 void amdgpu_amdkfd_block_mmu_notifications(void *p);
 int amdgpu_amdkfd_criu_resume(void *p);
-bool amdgpu_amdkfd_ras_query_utcl2_poison_status(struct amdgpu_device *adev,
-                       int hub_inst, int hub_type);
 int amdgpu_amdkfd_reserve_mem_limit(struct amdgpu_device *adev,
                uint64_t size, u32 alloc_flag, int8_t xcp_id);
 void amdgpu_amdkfd_unreserve_mem_limit(struct amdgpu_device *adev,
index 103a837..c7b44ae 100644 (file)
@@ -38,8 +38,6 @@ struct amdgpu_gfxhub_funcs {
        void (*mode2_save_regs)(struct amdgpu_device *adev);
        void (*mode2_restore_regs)(struct amdgpu_device *adev);
        void (*halt)(struct amdgpu_device *adev);
-       bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,
-                       int xcc_id);
 };
 
 struct amdgpu_gfxhub {
index 95d676e..1ca9d4e 100644 (file)
@@ -63,8 +63,6 @@ struct amdgpu_mmhub_funcs {
                                uint64_t page_table_base);
        void (*update_power_gating)(struct amdgpu_device *adev,
                                 bool enable);
-       bool (*query_utcl2_poison_status)(struct amdgpu_device *adev,
-                               int hub_inst);
 };
 
 struct amdgpu_mmhub {
index d200310..0e3ddea 100644 (file)
@@ -443,23 +443,6 @@ static void gfxhub_v1_0_init(struct amdgpu_device *adev)
                mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32;
 }
 
-static bool gfxhub_v1_0_query_utcl2_poison_status(struct amdgpu_device *adev,
-                               int xcc_id)
-{
-       u32 status = 0;
-       struct amdgpu_vmhub *hub;
-
-       if (amdgpu_ip_version(adev, GC_HWIP, 0) != IP_VERSION(9, 4, 2))
-               return false;
-
-       hub = &adev->vmhub[AMDGPU_GFXHUB(0)];
-       status = RREG32(hub->vm_l2_pro_fault_status);
-       /* reset page fault status */
-       WREG32_P(hub->vm_l2_pro_fault_cntl, 1, ~1);
-
-       return REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
-}
-
 const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {
        .get_mc_fb_offset = gfxhub_v1_0_get_mc_fb_offset,
        .setup_vm_pt_regs = gfxhub_v1_0_setup_vm_pt_regs,
@@ -468,5 +451,4 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_0_funcs = {
        .set_fault_enable_default = gfxhub_v1_0_set_fault_enable_default,
        .init = gfxhub_v1_0_init,
        .get_xgmi_info = gfxhub_v1_1_get_xgmi_info,
-       .query_utcl2_poison_status = gfxhub_v1_0_query_utcl2_poison_status,
 };
index 72109ab..ed8e130 100644 (file)
@@ -622,22 +622,6 @@ static int gfxhub_v1_2_get_xgmi_info(struct amdgpu_device *adev)
        return 0;
 }
 
-static bool gfxhub_v1_2_query_utcl2_poison_status(struct amdgpu_device *adev,
-                               int xcc_id)
-{
-       u32 fed, status;
-
-       status = RREG32_SOC15(GC, GET_INST(GC, xcc_id), regVM_L2_PROTECTION_FAULT_STATUS);
-       fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
-       if (!amdgpu_sriov_vf(adev)) {
-               /* clear page fault status and address */
-               WREG32_P(SOC15_REG_OFFSET(GC, GET_INST(GC, xcc_id),
-                        regVM_L2_PROTECTION_FAULT_CNTL), 1, ~1);
-       }
-
-       return fed;
-}
-
 const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {
        .get_mc_fb_offset = gfxhub_v1_2_get_mc_fb_offset,
        .setup_vm_pt_regs = gfxhub_v1_2_setup_vm_pt_regs,
@@ -646,7 +630,6 @@ const struct amdgpu_gfxhub_funcs gfxhub_v1_2_funcs = {
        .set_fault_enable_default = gfxhub_v1_2_set_fault_enable_default,
        .init = gfxhub_v1_2_init,
        .get_xgmi_info = gfxhub_v1_2_get_xgmi_info,
-       .query_utcl2_poison_status = gfxhub_v1_2_query_utcl2_poison_status,
 };
 
 static int gfxhub_v1_2_xcp_resume(void *handle, uint32_t inst_mask)
index 915203b..b01bb75 100644 (file)
@@ -559,22 +559,6 @@ static void mmhub_v1_8_get_clockgating(struct amdgpu_device *adev, u64 *flags)
 
 }
 
-static bool mmhub_v1_8_query_utcl2_poison_status(struct amdgpu_device *adev,
-                               int hub_inst)
-{
-       u32 fed, status;
-
-       status = RREG32_SOC15(MMHUB, hub_inst, regVM_L2_PROTECTION_FAULT_STATUS);
-       fed = REG_GET_FIELD(status, VM_L2_PROTECTION_FAULT_STATUS, FED);
-       if (!amdgpu_sriov_vf(adev)) {
-               /* clear page fault status and address */
-               WREG32_P(SOC15_REG_OFFSET(MMHUB, hub_inst,
-                        regVM_L2_PROTECTION_FAULT_CNTL), 1, ~1);
-       }
-
-       return fed;
-}
-
 const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {
        .get_fb_location = mmhub_v1_8_get_fb_location,
        .init = mmhub_v1_8_init,
@@ -584,7 +568,6 @@ const struct amdgpu_mmhub_funcs mmhub_v1_8_funcs = {
        .setup_vm_pt_regs = mmhub_v1_8_setup_vm_pt_regs,
        .set_clockgating = mmhub_v1_8_set_clockgating,
        .get_clockgating = mmhub_v1_8_get_clockgating,
-       .query_utcl2_poison_status = mmhub_v1_8_query_utcl2_poison_status,
 };
 
 static const struct amdgpu_ras_err_status_reg_entry mmhub_v1_8_ce_reg_list[] = {