drm/amd/display: Add DPCS regs for dcn3 link encoder
authorBhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Fri, 21 Aug 2020 15:57:15 +0000 (11:57 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 26 Aug 2020 20:40:18 +0000 (16:40 -0400)
dpcs reg are missing for dcn3 link encoder regs list, so add them.

Also remove
DPCSTX_DEBUG_CONFIG and RDPCSTX_DEBUG_CONFIG as they are unused and
cause compile errors for dcn3

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn20/dcn20_link_encoder.h
drivers/gpu/drm/amd/display/dc/dcn30/dcn30_resource.c

index dcbf28d..864acd6 100644 (file)
        SRI(RDPCSTX_PHY_FUSE3, RDPCSTX, id), \
        SRI(DPCSTX_TX_CLOCK_CNTL, DPCSTX, id), \
        SRI(DPCSTX_TX_CNTL, DPCSTX, id), \
-       SRI(DPCSTX_DEBUG_CONFIG, DPCSTX, id), \
-       SRI(RDPCSTX_DEBUG_CONFIG, RDPCSTX, id), \
        SR(RDPCSTX0_RDPCSTX_SCRATCH)
 
 
index 957fc37..8be4f21 100644 (file)
@@ -491,6 +491,7 @@ static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = {
 [id] = {\
        LE_DCN3_REG_LIST(id), \
        UNIPHY_DCN2_REG_LIST(phyid), \
+       DPCS_DCN2_REG_LIST(id), \
        SRI(DP_DPHY_INTERNAL_CTRL, DP, id) \
 }