Merge branch 'msm-next-lumag' into HEAD
authorDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 22 Jan 2023 20:43:59 +0000 (22:43 +0200)
committerDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Sun, 22 Jan 2023 20:43:59 +0000 (22:43 +0200)
Merge display-related changes targeting Qualcomm DRM MSM driver.

Notable changes:

DPU, DSI, MDSS:
- Support for SM8350, SM8450 SM8550 and SC8280XP platform

Core:
- Added bindings for SM8150 (driver support already present)

DPU:
- Partial support for DSC on SM8150 and SM8250
- Fixed color transformation matrix being lost on suspend/resume

DP:
- Support for DP on SDM845 and SC8280XP platforms
- HPD fixes
- Support for limiting DP link rate via DT property, this enables
  support for HBR3 rates.

DSI:
- Validate display modes according to the DSI OPP table
- DSI PHY support for the SM6375 platform
- Fixed byte intf clock selection for 14nm PHYs

MDP5:
- Schema conversion to YAML

Misc fixes as usual

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
1  2 
Documentation/devicetree/bindings/display/msm/gpu.yaml
drivers/gpu/drm/msm/Kconfig
drivers/gpu/drm/msm/adreno/a6xx_gpu.c
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
drivers/gpu/drm/msm/dp/dp_display.c
drivers/gpu/drm/msm/msm_drv.c
drivers/gpu/drm/msm/msm_drv.h
drivers/gpu/drm/msm/msm_gem_submit.c

Simple merge
Simple merge
Simple merge
@@@ -420,7 -418,11 +420,9 @@@ static int msm_drm_init(struct device *
        priv->dev = ddev;
  
        priv->wq = alloc_ordered_workqueue("msm", 0);
+       if (!priv->wq)
+               return -ENOMEM;
  
 -      priv->hangcheck_period = DRM_MSM_HANGCHECK_DEFAULT_PERIOD;
 -
        INIT_LIST_HEAD(&priv->objects);
        mutex_init(&priv->obj_lock);
  
Simple merge
Simple merge