riscv: Move nop definition to insn-def.h

We have duplicated the definition of the nop instruction in ftrace.h and
in jump_label.c. Move this definition into the generic file insn-def.h
so that they can share the definition with each other and with future
files.

Signed-off-by: Charlie Jenkins <charlie@rivosinc.com>
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Tested-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Link: https://lore.kernel.org/r/20250319-runtime_const_riscv-v10-1-745b31a11d65@rivosinc.com
Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com>

diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h
index c4721ce..b7f361a 100644 (file)
--- a/arch/riscv/include/asm/ftrace.h
+++ b/arch/riscv/include/asm/ftrace.h
@@ -79,7 +79,6 @@ struct dyn_arch_ftrace {
 #define AUIPC_RA               (0x00000097)
 #define JALR_T0                        (0x000282e7)
 #define AUIPC_T0               (0x00000297)
-#define NOP4                   (0x00000013)
 
 #define to_jalr_t0(offset)                                             \
        (((offset & JALR_OFFSET_MASK) << JALR_SHIFT) | JALR_T0)

diff --git a/arch/riscv/include/asm/insn-def.h b/arch/riscv/include/asm/insn-def.h
index 9a91301..71060a2 100644 (file)
--- a/arch/riscv/include/asm/insn-def.h
+++ b/arch/riscv/include/asm/insn-def.h
@@ -199,5 +199,8 @@
 #define RISCV_PAUSE    ".4byte 0x100000f"
 #define ZAWRS_WRS_NTO  ".4byte 0x00d00073"
 #define ZAWRS_WRS_STO  ".4byte 0x01d00073"
+#define RISCV_NOP4     ".4byte 0x00000013"
+
+#define RISCV_INSN_NOP4        _AC(0x00000013, U)
 
 #endif /* __ASM_INSN_DEF_H */

diff --git a/arch/riscv/kernel/ftrace.c b/arch/riscv/kernel/ftrace.c
index 3524db5..674dcdf 100644 (file)
--- a/arch/riscv/kernel/ftrace.c
+++ b/arch/riscv/kernel/ftrace.c
@@ -36,7 +36,7 @@ static int ftrace_check_current_call(unsigned long hook_pos,
                                     unsigned int *expected)
 {
        unsigned int replaced[2];
-       unsigned int nops[2] = {NOP4, NOP4};
+       unsigned int nops[2] = {RISCV_INSN_NOP4, RISCV_INSN_NOP4};
 
        /* we expect nops at the hook position */
        if (!expected)
@@ -68,7 +68,7 @@ static int __ftrace_modify_call(unsigned long hook_pos, unsigned long target,
                                bool enable, bool ra)
 {
        unsigned int call[2];
-       unsigned int nops[2] = {NOP4, NOP4};
+       unsigned int nops[2] = {RISCV_INSN_NOP4, RISCV_INSN_NOP4};
 
        if (ra)
                make_call_ra(hook_pos, target, call);
@@ -97,7 +97,7 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
 int ftrace_make_nop(struct module *mod, struct dyn_ftrace *rec,
                    unsigned long addr)
 {
-       unsigned int nops[2] = {NOP4, NOP4};
+       unsigned int nops[2] = {RISCV_INSN_NOP4, RISCV_INSN_NOP4};
 
        if (patch_insn_write((void *)rec->ip, nops, MCOUNT_INSN_SIZE))
                return -EPERM;

diff --git a/arch/riscv/kernel/jump_label.c b/arch/riscv/kernel/jump_label.c
index 654ed15..b4c1a6a 100644 (file)
--- a/arch/riscv/kernel/jump_label.c
+++ b/arch/riscv/kernel/jump_label.c
@@ -11,8 +11,8 @@
 #include <asm/bug.h>
 #include <asm/cacheflush.h>
 #include <asm/text-patching.h>
+#include <asm/insn-def.h>
 
-#define RISCV_INSN_NOP 0x00000013U
 #define RISCV_INSN_JAL 0x0000006fU
 
 bool arch_jump_label_transform_queue(struct jump_entry *entry,
@@ -33,7 +33,7 @@ bool arch_jump_label_transform_queue(struct jump_entry *entry,
                        (((u32)offset & GENMASK(10,  1)) << (21 -  1)) |
                        (((u32)offset & GENMASK(20, 20)) << (31 - 20));
        } else {
-               insn = RISCV_INSN_NOP;
+               insn = RISCV_INSN_NOP4;
        }
 
        if (early_boot_irqs_disabled) {