drm/amdgpu: add the IP discovery IP versions for HW INFO data
authorAlex Deucher <alexander.deucher@amd.com>
Thu, 5 May 2022 22:09:11 +0000 (18:09 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 25 Jul 2022 13:31:03 +0000 (09:31 -0400)
Use the former pad element to store the IP versions from the
IP discovery table.  This allows userspace to get the IP
version from the kernel to better align with hardware IP
versions.

Proposed mesa patch:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17411/diffs?commit_id=c8a63590dfd0d64e6e6a634dcfed993f135dd075

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c
include/uapi/drm/amdgpu_drm.h

index b8ba59c..1369c25 100644 (file)
@@ -461,6 +461,30 @@ static int amdgpu_hw_ip_info(struct amdgpu_device *adev,
 
        result->hw_ip_version_major = adev->ip_blocks[i].version->major;
        result->hw_ip_version_minor = adev->ip_blocks[i].version->minor;
+
+       if (adev->asic_type >= CHIP_VEGA10) {
+               switch (type) {
+               case AMD_IP_BLOCK_TYPE_GFX:
+                       result->ip_discovery_version = adev->ip_versions[GC_HWIP][0];
+                       break;
+               case AMD_IP_BLOCK_TYPE_SDMA:
+                       result->ip_discovery_version = adev->ip_versions[SDMA0_HWIP][0];
+                       break;
+               case AMD_IP_BLOCK_TYPE_UVD:
+               case AMD_IP_BLOCK_TYPE_VCN:
+               case AMD_IP_BLOCK_TYPE_JPEG:
+                       result->ip_discovery_version = adev->ip_versions[UVD_HWIP][0];
+                       break;
+               case AMD_IP_BLOCK_TYPE_VCE:
+                       result->ip_discovery_version = adev->ip_versions[VCE_HWIP][0];
+                       break;
+               default:
+                       result->ip_discovery_version = 0;
+                       break;
+               }
+       } else {
+               result->ip_discovery_version = 0;
+       }
        result->capabilities_flags = 0;
        result->available_rings = (1 << num_rings) - 1;
        result->ib_start_alignment = ib_start_alignment;
index 63de71f..c2c9c67 100644 (file)
@@ -1097,7 +1097,8 @@ struct drm_amdgpu_info_hw_ip {
        __u32  ib_size_alignment;
        /** Bitmask of available rings. Bit 0 means ring 0, etc. */
        __u32  available_rings;
-       __u32  _pad;
+       /** version info: bits 23:16 major, 15:8 minor, 7:0 revision */
+       __u32  ip_discovery_version;
 };
 
 struct drm_amdgpu_info_num_handles {