drm/nouveau/mc/gf100-: handle second interrupt tree
authorBen Skeggs <bskeggs@redhat.com>
Thu, 20 Aug 2015 04:54:22 +0000 (14:54 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 28 Aug 2015 02:40:48 +0000 (12:40 +1000)
Doesn't fix any known issue, but best be safe in case control is handed
to us from firmware with these left enabled.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf100.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gf106.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/gk20a.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

index 5ad0080..6688d23 100644 (file)
@@ -48,6 +48,32 @@ gf100_mc_intr[] = {
        {},
 };
 
+void
+gf100_mc_intr_unarm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000000);
+       nvkm_wr32(device, 0x000144, 0x00000000);
+       nvkm_rd32(device, 0x000140);
+}
+
+void
+gf100_mc_intr_rearm(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       nvkm_wr32(device, 0x000140, 0x00000001);
+       nvkm_wr32(device, 0x000144, 0x00000001);
+}
+
+u32
+gf100_mc_intr_mask(struct nvkm_mc *mc)
+{
+       struct nvkm_device *device = mc->subdev.device;
+       u32 intr0 = nvkm_rd32(device, 0x000100);
+       u32 intr1 = nvkm_rd32(device, 0x000104);
+       return intr0 | intr1;
+}
+
 static void
 gf100_mc_msi_rearm(struct nvkm_mc *mc)
 {
@@ -64,9 +90,9 @@ static const struct nvkm_mc_func
 gf100_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = gf100_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };
index 435f788..31223cf 100644 (file)
@@ -27,9 +27,9 @@ static const struct nvkm_mc_func
 gf106_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
        .unk260 = gf100_mc_unk260,
 };
index 9a8b566..0592bd5 100644 (file)
@@ -27,9 +27,9 @@ static const struct nvkm_mc_func
 gk20a_mc = {
        .init = nv50_mc_init,
        .intr = gf100_mc_intr,
-       .intr_unarm = nv04_mc_intr_unarm,
-       .intr_rearm = nv04_mc_intr_rearm,
-       .intr_mask = nv04_mc_intr_mask,
+       .intr_unarm = gf100_mc_intr_unarm,
+       .intr_rearm = gf100_mc_intr_rearm,
+       .intr_mask = gf100_mc_intr_mask,
        .msi_rearm = nv40_mc_msi_rearm,
 };
 
index 5f94072..5e10ea6 100644 (file)
@@ -38,5 +38,8 @@ void nv50_mc_init(struct nvkm_mc *);
 extern const struct nvkm_mc_intr nv50_mc_intr[];
 
 extern const struct nvkm_mc_intr gf100_mc_intr[];
+void gf100_mc_intr_unarm(struct nvkm_mc *);
+void gf100_mc_intr_rearm(struct nvkm_mc *);
+u32 gf100_mc_intr_mask(struct nvkm_mc *);
 void gf100_mc_unk260(struct nvkm_mc *, u32);
 #endif