irqchip/sifive-plic: Respect mask state when setting affinity
authorInochi Amaoto <inochiama@gmail.com>
Mon, 11 Aug 2025 00:26:32 +0000 (08:26 +0800)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 24 Aug 2025 10:20:18 +0000 (12:20 +0200)
plic_set_affinity() always calls plic_irq_enable(), which clears up the
priority setting even the interrupt is only masked. This unmasks the
interrupt unexpectly.

Replace the plic_irq_enable/disable() with plic_irq_toggle() to avoid
changing the priority setting.

Suggested-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Nam Cao <namcao@linutronix.de> # VisionFive 2
Tested-by: Chen Wang <unicorn_wang@outlook.com> # Pioneerbox
Reviewed-by: Nam Cao <namcao@linutronix.de>
Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Link: https://lore.kernel.org/all/20250811002633.55275-1-inochiama@gmail.com
Link: https://lore.kernel.org/lkml/20250722224513.22125-1-inochiama@gmail.com/
drivers/irqchip/irq-sifive-plic.c

index 3de5460..559fda8 100644 (file)
@@ -179,12 +179,14 @@ static int plic_set_affinity(struct irq_data *d,
        if (cpu >= nr_cpu_ids)
                return -EINVAL;
 
-       plic_irq_disable(d);
+       /* Invalidate the original routing entry */
+       plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 0);
 
        irq_data_update_effective_affinity(d, cpumask_of(cpu));
 
+       /* Setting the new routing entry if irq is enabled */
        if (!irqd_irq_disabled(d))
-               plic_irq_enable(d);
+               plic_irq_toggle(irq_data_get_effective_affinity_mask(d), d, 1);
 
        return IRQ_SET_MASK_OK_DONE;
 }