net: stmmac: mac debug prepared for multiple queues
authorJoao Pinto <Joao.Pinto@synopsys.com>
Fri, 10 Mar 2017 18:24:58 +0000 (18:24 +0000)
committerDavid S. Miller <davem@davemloft.net>
Mon, 13 Mar 2017 06:41:04 +0000 (23:41 -0700)
This patch prepares mac debug dump for multiple queues.

Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/common.h
drivers/net/ethernet/stmicro/stmmac/dwmac1000_core.c
drivers/net/ethernet/stmicro/stmmac/dwmac4_core.c
drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c

index 23c9e2a..e7fb985 100644 (file)
@@ -491,7 +491,8 @@ struct stmmac_ops {
        void (*reset_eee_mode)(struct mac_device_info *hw);
        void (*set_eee_timer)(struct mac_device_info *hw, int ls, int tw);
        void (*set_eee_pls)(struct mac_device_info *hw, int link);
-       void (*debug)(void __iomem *ioaddr, struct stmmac_extra_stats *x);
+       void (*debug)(void __iomem *ioaddr, struct stmmac_extra_stats *x,
+                     u32 rx_queues, u32 tx_queues);
        /* PCS calls */
        void (*pcs_ctrl_ane)(void __iomem *ioaddr, bool ane, bool srgmi_ral,
                             bool loopback);
index 3a95ad9..7f78f77 100644 (file)
@@ -413,7 +413,8 @@ static void dwmac1000_get_adv_lp(void __iomem *ioaddr, struct rgmii_adv *adv)
        dwmac_get_adv_lp(ioaddr, GMAC_PCS_BASE, adv);
 }
 
-static void dwmac1000_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x)
+static void dwmac1000_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x,
+                           u32 rx_queues, u32 tx_queues)
 {
        u32 value = readl(ioaddr + GMAC_DEBUG);
 
index f0f2dce..670cfee 100644 (file)
@@ -469,64 +469,69 @@ static int dwmac4_irq_status(struct mac_device_info *hw,
        return ret;
 }
 
-static void dwmac4_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x)
+static void dwmac4_debug(void __iomem *ioaddr, struct stmmac_extra_stats *x,
+                        u32 rx_queues, u32 tx_queues)
 {
        u32 value;
-
-       /*  Currently only channel 0 is supported */
-       value = readl(ioaddr + MTL_CHAN_TX_DEBUG(STMMAC_CHAN0));
-
-       if (value & MTL_DEBUG_TXSTSFSTS)
-               x->mtl_tx_status_fifo_full++;
-       if (value & MTL_DEBUG_TXFSTS)
-               x->mtl_tx_fifo_not_empty++;
-       if (value & MTL_DEBUG_TWCSTS)
-               x->mmtl_fifo_ctrl++;
-       if (value & MTL_DEBUG_TRCSTS_MASK) {
-               u32 trcsts = (value & MTL_DEBUG_TRCSTS_MASK)
-                            >> MTL_DEBUG_TRCSTS_SHIFT;
-               if (trcsts == MTL_DEBUG_TRCSTS_WRITE)
-                       x->mtl_tx_fifo_read_ctrl_write++;
-               else if (trcsts == MTL_DEBUG_TRCSTS_TXW)
-                       x->mtl_tx_fifo_read_ctrl_wait++;
-               else if (trcsts == MTL_DEBUG_TRCSTS_READ)
-                       x->mtl_tx_fifo_read_ctrl_read++;
-               else
-                       x->mtl_tx_fifo_read_ctrl_idle++;
+       u32 queue;
+
+       for (queue = 0; queue < tx_queues; queue++) {
+               value = readl(ioaddr + MTL_CHAN_TX_DEBUG(queue));
+
+               if (value & MTL_DEBUG_TXSTSFSTS)
+                       x->mtl_tx_status_fifo_full++;
+               if (value & MTL_DEBUG_TXFSTS)
+                       x->mtl_tx_fifo_not_empty++;
+               if (value & MTL_DEBUG_TWCSTS)
+                       x->mmtl_fifo_ctrl++;
+               if (value & MTL_DEBUG_TRCSTS_MASK) {
+                       u32 trcsts = (value & MTL_DEBUG_TRCSTS_MASK)
+                                    >> MTL_DEBUG_TRCSTS_SHIFT;
+                       if (trcsts == MTL_DEBUG_TRCSTS_WRITE)
+                               x->mtl_tx_fifo_read_ctrl_write++;
+                       else if (trcsts == MTL_DEBUG_TRCSTS_TXW)
+                               x->mtl_tx_fifo_read_ctrl_wait++;
+                       else if (trcsts == MTL_DEBUG_TRCSTS_READ)
+                               x->mtl_tx_fifo_read_ctrl_read++;
+                       else
+                               x->mtl_tx_fifo_read_ctrl_idle++;
+               }
+               if (value & MTL_DEBUG_TXPAUSED)
+                       x->mac_tx_in_pause++;
        }
-       if (value & MTL_DEBUG_TXPAUSED)
-               x->mac_tx_in_pause++;
 
-       value = readl(ioaddr + MTL_CHAN_RX_DEBUG(STMMAC_CHAN0));
+       for (queue = 0; queue < rx_queues; queue++) {
+               value = readl(ioaddr + MTL_CHAN_RX_DEBUG(queue));
 
-       if (value & MTL_DEBUG_RXFSTS_MASK) {
-               u32 rxfsts = (value & MTL_DEBUG_RXFSTS_MASK)
-                            >> MTL_DEBUG_RRCSTS_SHIFT;
+               if (value & MTL_DEBUG_RXFSTS_MASK) {
+                       u32 rxfsts = (value & MTL_DEBUG_RXFSTS_MASK)
+                                    >> MTL_DEBUG_RRCSTS_SHIFT;
 
-               if (rxfsts == MTL_DEBUG_RXFSTS_FULL)
-                       x->mtl_rx_fifo_fill_level_full++;
-               else if (rxfsts == MTL_DEBUG_RXFSTS_AT)
-                       x->mtl_rx_fifo_fill_above_thresh++;
-               else if (rxfsts == MTL_DEBUG_RXFSTS_BT)
-                       x->mtl_rx_fifo_fill_below_thresh++;
-               else
-                       x->mtl_rx_fifo_fill_level_empty++;
-       }
-       if (value & MTL_DEBUG_RRCSTS_MASK) {
-               u32 rrcsts = (value & MTL_DEBUG_RRCSTS_MASK) >>
-                            MTL_DEBUG_RRCSTS_SHIFT;
-
-               if (rrcsts == MTL_DEBUG_RRCSTS_FLUSH)
-                       x->mtl_rx_fifo_read_ctrl_flush++;
-               else if (rrcsts == MTL_DEBUG_RRCSTS_RSTAT)
-                       x->mtl_rx_fifo_read_ctrl_read_data++;
-               else if (rrcsts == MTL_DEBUG_RRCSTS_RDATA)
-                       x->mtl_rx_fifo_read_ctrl_status++;
-               else
-                       x->mtl_rx_fifo_read_ctrl_idle++;
+                       if (rxfsts == MTL_DEBUG_RXFSTS_FULL)
+                               x->mtl_rx_fifo_fill_level_full++;
+                       else if (rxfsts == MTL_DEBUG_RXFSTS_AT)
+                               x->mtl_rx_fifo_fill_above_thresh++;
+                       else if (rxfsts == MTL_DEBUG_RXFSTS_BT)
+                               x->mtl_rx_fifo_fill_below_thresh++;
+                       else
+                               x->mtl_rx_fifo_fill_level_empty++;
+               }
+               if (value & MTL_DEBUG_RRCSTS_MASK) {
+                       u32 rrcsts = (value & MTL_DEBUG_RRCSTS_MASK) >>
+                                    MTL_DEBUG_RRCSTS_SHIFT;
+
+                       if (rrcsts == MTL_DEBUG_RRCSTS_FLUSH)
+                               x->mtl_rx_fifo_read_ctrl_flush++;
+                       else if (rrcsts == MTL_DEBUG_RRCSTS_RSTAT)
+                               x->mtl_rx_fifo_read_ctrl_read_data++;
+                       else if (rrcsts == MTL_DEBUG_RRCSTS_RDATA)
+                               x->mtl_rx_fifo_read_ctrl_status++;
+                       else
+                               x->mtl_rx_fifo_read_ctrl_idle++;
+               }
+               if (value & MTL_DEBUG_RWCSTS)
+                       x->mtl_rx_fifo_ctrl_active++;
        }
-       if (value & MTL_DEBUG_RWCSTS)
-               x->mtl_rx_fifo_ctrl_active++;
 
        /* GMAC debug */
        value = readl(ioaddr + GMAC_DEBUG);
index 4a5dc89..61b9369 100644 (file)
@@ -520,6 +520,8 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
                                 struct ethtool_stats *dummy, u64 *data)
 {
        struct stmmac_priv *priv = netdev_priv(dev);
+       u32 rx_queues_count = priv->plat->rx_queues_to_use;
+       u32 tx_queues_count = priv->plat->tx_queues_to_use;
        int i, j = 0;
 
        /* Update the DMA HW counters for dwmac10/100 */
@@ -550,7 +552,8 @@ static void stmmac_get_ethtool_stats(struct net_device *dev,
                if ((priv->hw->mac->debug) &&
                    (priv->synopsys_id >= DWMAC_CORE_3_50))
                        priv->hw->mac->debug(priv->ioaddr,
-                                            (void *)&priv->xstats);
+                                            (void *)&priv->xstats,
+                                            rx_queues_count, tx_queues_count);
        }
        for (i = 0; i < STMMAC_STATS_LEN; i++) {
                char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;