net: micrel: Fix PTP frame parsing for lan8841

The HW has the capability to check each frame if it is a PTP frame,
which domain it is, which ptp frame type it is, different ip address in
the frame. And if one of these checks fail then the frame is not
timestamp. Most of these checks were disabled except checking the field
minorVersionPTP inside the PTP header. Meaning that once a partner sends
a frame compliant to 8021AS which has minorVersionPTP set to 1, then the
frame was not timestamp because the HW expected by default a value of 0
in minorVersionPTP.
Fix this issue by removing this check so the userspace can decide on this.

Fixes: cafc3662ee3f ("net: micrel: Add PHC support for lan8841")
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Divya Koppera <divya.koppera@microchip.com>
Reviewed-by: Rahul Rameshbabu <rrameshbabu@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index d2aa3d0..bf40534 100644 (file)
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -3338,8 +3338,10 @@ static int lan8814_probe(struct phy_device *phydev)
 #define LAN8841_ADC_CHANNEL_MASK               198
 #define LAN8841_PTP_RX_PARSE_L2_ADDR_EN                370
 #define LAN8841_PTP_RX_PARSE_IP_ADDR_EN                371
+#define LAN8841_PTP_RX_VERSION                 374
 #define LAN8841_PTP_TX_PARSE_L2_ADDR_EN                434
 #define LAN8841_PTP_TX_PARSE_IP_ADDR_EN                435
+#define LAN8841_PTP_TX_VERSION                 438
 #define LAN8841_PTP_CMD_CTL                    256
 #define LAN8841_PTP_CMD_CTL_PTP_ENABLE         BIT(2)
 #define LAN8841_PTP_CMD_CTL_PTP_DISABLE                BIT(1)
@@ -3383,6 +3385,12 @@ static int lan8841_config_init(struct phy_device *phydev)
        phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG,
                      LAN8841_PTP_RX_PARSE_IP_ADDR_EN, 0);
 
+       /* Disable checking for minorVersionPTP field */
+       phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG,
+                     LAN8841_PTP_RX_VERSION, 0xff00);
+       phy_write_mmd(phydev, KSZ9131RN_MMD_COMMON_CTRL_REG,
+                     LAN8841_PTP_TX_VERSION, 0xff00);
+
        /* 100BT Clause 40 improvenent errata */
        phy_write_mmd(phydev, LAN8841_MMD_ANALOG_REG,
                      LAN8841_ANALOG_CONTROL_1,