h8300: unaligned divcr register support.

DIVCR is unaligned long word.
So we need adjustment for long word align.

Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>

diff --git a/drivers/clk/h8300/clk-div.c b/drivers/clk/h8300/clk-div.c
index 1dd5d14..d71d011 100644 (file)
--- a/drivers/clk/h8300/clk-div.c
+++ b/drivers/clk/h8300/clk-div.c
@@ -19,6 +19,7 @@ static void __init h8300_div_clk_setup(struct device_node *node)
        const char *parent_name;
        void __iomem *divcr = NULL;
        int width;
+       int offset;
 
        num_parents = of_clk_get_parent_count(node);
        if (num_parents < 1) {
@@ -31,11 +32,14 @@ static void __init h8300_div_clk_setup(struct device_node *node)
                pr_err("%s: failed to map divide register", clk_name);
                goto error;
        }
+       offset = (unsigned long)divcr & 3;
+       offset = (3 - offset) * 8;
+       divcr = (void *)((unsigned long)divcr & ~3);
 
        parent_name = of_clk_get_parent_name(node, 0);
        of_property_read_u32(node, "renesas,width", &width);
        clk = clk_register_divider(NULL, clk_name, parent_name,
-                                  CLK_SET_RATE_GATE, divcr, 0, width,
+                                  CLK_SET_RATE_GATE, divcr, offset, width,
                                   CLK_DIVIDER_POWER_OF_TWO, &clklock);
        if (!IS_ERR(clk)) {
                of_clk_add_provider(node, of_clk_src_simple_get, clk);