net: lan966x: Add QUSGMII support for lan966x

The Lan996x controller supports the QUSGMII mode, which is very similar
to QSGMII in the way it's configured and the autonegociation
capababilities it provides.

This commit adds support for that mode, treating it most of the time
like QSGMII, making sure that we do configure the PCS how we should.

Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c
index d928b75..2ad0786 100644 (file)
--- a/drivers/net/ethernet/microchip/lan966x/lan966x_main.c
+++ b/drivers/net/ethernet/microchip/lan966x/lan966x_main.c
@@ -778,6 +778,8 @@ static int lan966x_probe_port(struct lan966x *lan966x, u32 p,
                  port->phylink_config.supported_interfaces);
        __set_bit(PHY_INTERFACE_MODE_QSGMII,
                  port->phylink_config.supported_interfaces);
+       __set_bit(PHY_INTERFACE_MODE_QUSGMII,
+                 port->phylink_config.supported_interfaces);
        __set_bit(PHY_INTERFACE_MODE_1000BASEX,
                  port->phylink_config.supported_interfaces);
        __set_bit(PHY_INTERFACE_MODE_2500BASEX,

diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c b/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c
index 38a7e95..87f3d3a 100644 (file)
--- a/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c
+++ b/drivers/net/ethernet/microchip/lan966x/lan966x_phylink.c
@@ -28,11 +28,12 @@ static int lan966x_phylink_mac_prepare(struct phylink_config *config,
                                       phy_interface_t iface)
 {
        struct lan966x_port *port = netdev_priv(to_net_dev(config->dev));
+       phy_interface_t serdes_mode = iface;
        int err;
 
        if (port->serdes) {
                err = phy_set_mode_ext(port->serdes, PHY_MODE_ETHERNET,
-                                      iface);
+                                      serdes_mode);
                if (err) {
                        netdev_err(to_net_dev(config->dev),
                                   "Could not set mode of SerDes\n");

diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_port.c b/drivers/net/ethernet/microchip/lan966x/lan966x_port.c
index f141644..bbf42fc 100644 (file)
--- a/drivers/net/ethernet/microchip/lan966x/lan966x_port.c
+++ b/drivers/net/ethernet/microchip/lan966x/lan966x_port.c
@@ -168,7 +168,7 @@ static void lan966x_port_link_up(struct lan966x_port *port)
        /* Also the GIGA_MODE_ENA(1) needs to be set regardless of the
         * port speed for QSGMII ports.
         */
-       if (config->portmode == PHY_INTERFACE_MODE_QSGMII)
+       if (phy_interface_num_ports(config->portmode) == 4)
                mode = DEV_MAC_MODE_CFG_GIGA_MODE_ENA_SET(1);
 
        lan_wr(config->duplex | mode,
@@ -331,10 +331,14 @@ int lan966x_port_pcs_set(struct lan966x_port *port,
        struct lan966x *lan966x = port->lan966x;
        bool inband_aneg = false;
        bool outband;
+       bool full_preamble = false;
+
+       if (config->portmode == PHY_INTERFACE_MODE_QUSGMII)
+               full_preamble = true;
 
        if (config->inband) {
                if (config->portmode == PHY_INTERFACE_MODE_SGMII ||
-                   config->portmode == PHY_INTERFACE_MODE_QSGMII)
+                   phy_interface_num_ports(config->portmode) == 4)
                        inband_aneg = true; /* Cisco-SGMII in-band-aneg */
                else if (config->portmode == PHY_INTERFACE_MODE_1000BASEX &&
                         config->autoneg)
@@ -345,9 +349,15 @@ int lan966x_port_pcs_set(struct lan966x_port *port,
                outband = true;
        }
 
-       /* Disable or enable inband */
-       lan_rmw(DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA_SET(outband),
-               DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA,
+       /* Disable or enable inband.
+        * For QUSGMII, we rely on the preamble to transmit data such as
+        * timestamps, therefore force full preamble transmission, and prevent
+        * premable shortening
+        */
+       lan_rmw(DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA_SET(outband) |
+               DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA_SET(full_preamble),
+               DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA |
+               DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA,
                lan966x, DEV_PCS1G_MODE_CFG(port->chip_port));
 
        /* Enable PCS */
@@ -396,7 +406,7 @@ void lan966x_port_init(struct lan966x_port *port)
        if (lan966x->fdma)
                lan966x_fdma_netdev_init(lan966x, port->dev);
 
-       if (config->portmode != PHY_INTERFACE_MODE_QSGMII)
+       if (phy_interface_num_ports(config->portmode) != 4)
                return;
 
        lan_rmw(DEV_CLOCK_CFG_PCS_RX_RST_SET(0) |

diff --git a/drivers/net/ethernet/microchip/lan966x/lan966x_regs.h b/drivers/net/ethernet/microchip/lan966x/lan966x_regs.h
index 8265ad8..c53bae5 100644 (file)
--- a/drivers/net/ethernet/microchip/lan966x/lan966x_regs.h
+++ b/drivers/net/ethernet/microchip/lan966x/lan966x_regs.h
@@ -504,6 +504,12 @@ enum lan966x_target {
 #define DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA_GET(x)\
        FIELD_GET(DEV_PCS1G_MODE_CFG_SGMII_MODE_ENA, x)
 
+#define DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA        BIT(1)
+#define DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA_SET(x)\
+       FIELD_PREP(DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)
+#define DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA_GET(x)\
+       FIELD_GET(DEV_PCS1G_MODE_CFG_SAVE_PREAMBLE_ENA, x)
+
 /*      DEV:PCS1G_CFG_STATUS:PCS1G_SD_CFG */
 #define DEV_PCS1G_SD_CFG(t)       __REG(TARGET_DEV, t, 8, 72, 0, 1, 68, 8, 0, 1, 4)