*/
#include <linux/clk.h>
+#include <linux/completion.h>
#include <linux/fpga/adi-axi-common.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
-#include <linux/timer.h>
#define SPI_ENGINE_REG_RESET 0x40
spinlock_t lock;
void __iomem *base;
- struct timer_list watchdog_timer;
- struct spi_controller *controller;
-
+ struct completion msg_complete;
unsigned int int_enable;
};
if (pending & SPI_ENGINE_INT_SYNC && msg) {
if (completed_id == AXI_SPI_ENGINE_CUR_MSG_SYNC_ID) {
- if (timer_delete_sync(&spi_engine->watchdog_timer)) {
- msg->status = 0;
- msg->actual_length = msg->frame_length;
- spi_finalize_current_message(host);
- }
+ msg->status = 0;
+ msg->actual_length = msg->frame_length;
+ complete(&spi_engine->msg_complete);
disable_int |= SPI_ENGINE_INT_SYNC;
}
}
unsigned int int_enable = 0;
unsigned long flags;
- mod_timer(&spi_engine->watchdog_timer, jiffies + msecs_to_jiffies(5000));
+ reinit_completion(&spi_engine->msg_complete);
spin_lock_irqsave(&spi_engine->lock, flags);
spi_engine->int_enable = int_enable;
spin_unlock_irqrestore(&spi_engine->lock, flags);
- return 0;
-}
-
-static void spi_engine_timeout(struct timer_list *timer)
-{
- struct spi_engine *spi_engine = from_timer(spi_engine, timer, watchdog_timer);
- struct spi_controller *host = spi_engine->controller;
-
- if (WARN_ON(!host->cur_msg))
- return;
+ if (!wait_for_completion_timeout(&spi_engine->msg_complete,
+ msecs_to_jiffies(5000))) {
+ dev_err(&host->dev,
+ "Timeout occurred while waiting for transfer to complete. Hardware is probably broken.\n");
+ msg->status = -ETIMEDOUT;
+ }
- dev_err(&host->dev,
- "Timeout occurred while waiting for transfer to complete. Hardware is probably broken.\n");
- host->cur_msg->status = -ETIMEDOUT;
spi_finalize_current_message(host);
+
+ return msg->status;
}
static void spi_engine_release_hw(void *p)
spi_engine = spi_controller_get_devdata(host);
spin_lock_init(&spi_engine->lock);
- timer_setup(&spi_engine->watchdog_timer, spi_engine_timeout, TIMER_IRQSAFE);
- spi_engine->controller = host;
+ init_completion(&spi_engine->msg_complete);
spi_engine->clk = devm_clk_get_enabled(&pdev->dev, "s_axi_aclk");
if (IS_ERR(spi_engine->clk))