mlxsw: Set flood bridge type for FIDs
authorAmit Cohen <amcohen@nvidia.com>
Mon, 27 Jun 2022 07:06:13 +0000 (10:06 +0300)
committerPaolo Abeni <pabeni@redhat.com>
Tue, 28 Jun 2022 12:31:36 +0000 (14:31 +0200)
In the unified bridge model, the bridge type FID attribute is no longer
configured by the firmware, but instead by software when creating and
editing a FID via SFMR register.

Set this field as part of FID creation and edition flow. Default to 0
(reserved) as long as the driver operates in the legacy bridge model.

Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Petr Machata <petrm@nvidia.com>
Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
drivers/net/ethernet/mellanox/mlxsw/reg.h
drivers/net/ethernet/mellanox/mlxsw/spectrum_fid.c

index e198ee7..d0ebb56 100644 (file)
@@ -1961,7 +1961,8 @@ MLXSW_ITEM32(reg, sfmr, smpe, 0x28, 0, 16);
 
 static inline void mlxsw_reg_sfmr_pack(char *payload,
                                       enum mlxsw_reg_sfmr_op op, u16 fid,
-                                      u16 fid_offset, bool flood_rsp)
+                                      u16 fid_offset, bool flood_rsp,
+                                      enum mlxsw_reg_bridge_type bridge_type)
 {
        MLXSW_REG_ZERO(sfmr, payload);
        mlxsw_reg_sfmr_op_set(payload, op);
@@ -1970,6 +1971,7 @@ static inline void mlxsw_reg_sfmr_pack(char *payload,
        mlxsw_reg_sfmr_vtfp_set(payload, false);
        mlxsw_reg_sfmr_vv_set(payload, false);
        mlxsw_reg_sfmr_flood_rsp_set(payload, flood_rsp);
+       mlxsw_reg_sfmr_flood_bridge_type_set(payload, bridge_type);
 }
 
 /* SPVMLR - Switch Port VLAN MAC Learning Register
index 279e65a..3335d74 100644 (file)
@@ -422,28 +422,35 @@ static enum mlxsw_reg_sfmr_op mlxsw_sp_sfmr_op(bool valid)
 static int mlxsw_sp_fid_op(const struct mlxsw_sp_fid *fid, bool valid)
 {
        struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp;
+       enum mlxsw_reg_bridge_type bridge_type = 0;
        char sfmr_pl[MLXSW_REG_SFMR_LEN];
        bool flood_rsp = false;
 
-       if (mlxsw_sp->ubridge)
+       if (mlxsw_sp->ubridge) {
                flood_rsp = fid->fid_family->flood_rsp;
+               bridge_type = fid->fid_family->bridge_type;
+       }
 
        mlxsw_reg_sfmr_pack(sfmr_pl, mlxsw_sp_sfmr_op(valid), fid->fid_index,
-                           fid->fid_offset, flood_rsp);
+                           fid->fid_offset, flood_rsp, bridge_type);
        return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
 }
 
 static int mlxsw_sp_fid_edit_op(const struct mlxsw_sp_fid *fid)
 {
        struct mlxsw_sp *mlxsw_sp = fid->fid_family->mlxsw_sp;
+       enum mlxsw_reg_bridge_type bridge_type = 0;
        char sfmr_pl[MLXSW_REG_SFMR_LEN];
        bool flood_rsp = false;
 
-       if (mlxsw_sp->ubridge)
+       if (mlxsw_sp->ubridge) {
                flood_rsp = fid->fid_family->flood_rsp;
+               bridge_type = fid->fid_family->bridge_type;
+       }
 
        mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID,
-                           fid->fid_index, fid->fid_offset, flood_rsp);
+                           fid->fid_index, fid->fid_offset, flood_rsp,
+                           bridge_type);
        mlxsw_reg_sfmr_vv_set(sfmr_pl, fid->vni_valid);
        mlxsw_reg_sfmr_vni_set(sfmr_pl, be32_to_cpu(fid->vni));
        mlxsw_reg_sfmr_vtfp_set(sfmr_pl, fid->nve_flood_index_valid);