#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5
/* Interrupts */
-#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
-#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
+#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
+#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
static struct davinci_timer_instance da830_timer_instance[2] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
+ .cmp_irq = DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_1),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_1),
.cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
+ .cmp_irq = DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_1),
},
};
static struct davinci_timer_instance da850_timer_instance[4] = {
{
.base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0),
},
{
.base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_1),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_1),
},
{
.base = DA850_TIMER64P2_BASE,
- .bottom_irq = IRQ_DA850_TINT12_2,
- .top_irq = IRQ_DA850_TINT34_2,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_2),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_2),
},
{
.base = DA850_TIMER64P3_BASE,
- .bottom_irq = IRQ_DA850_TINT12_3,
- .top_irq = IRQ_DA850_TINT34_3,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT12_3),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_DA850_TINT34_3),
},
};
static struct resource da850_vpif_display_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
static struct resource da850_vpif_capture_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
static struct plat_serial8250_port da8xx_serial0_pdata[] = {
{
.mapbase = DA8XX_UART0_BASE,
- .irq = IRQ_DA8XX_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port da8xx_serial1_pdata[] = {
{
.mapbase = DA8XX_UART1_BASE,
- .irq = IRQ_DA8XX_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port da8xx_serial2_pdata[] = {
{
.mapbase = DA8XX_UART2_BASE,
- .irq = IRQ_DA8XX_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
},
{
.name = "edma3_ccint",
- .start = IRQ_DA8XX_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA8XX_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCERRINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "edma3_ccint",
- .start = IRQ_DA850_CCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCINT1),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA850_CCERRINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCERRINT1),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT0,
- .end = IRQ_DA8XX_I2CINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT1,
- .end = IRQ_DA8XX_I2CINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_RX_PULSE,
- .end = IRQ_DA8XX_C0_RX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_TX_PULSE,
- .end = IRQ_DA8XX_C0_TX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_MISC_PULSE,
- .end = IRQ_DA8XX_C0_MISC_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_EVTOUT0,
- .end = IRQ_DA8XX_EVTOUT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT1,
- .end = IRQ_DA8XX_EVTOUT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT2,
- .end = IRQ_DA8XX_EVTOUT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT3,
- .end = IRQ_DA8XX_EVTOUT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT4,
- .end = IRQ_DA8XX_EVTOUT4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT5,
- .end = IRQ_DA8XX_EVTOUT5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT6,
- .end = IRQ_DA8XX_EVTOUT6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT7,
- .end = IRQ_DA8XX_EVTOUT7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
[1] = { /* interrupt */
- .start = IRQ_DA8XX_LCDINT,
- .end = IRQ_DA8XX_LCDINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_GPIO0,
- .end = IRQ_DA8XX_GPIO0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO1,
- .end = IRQ_DA8XX_GPIO1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO2,
- .end = IRQ_DA8XX_GPIO2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO3,
- .end = IRQ_DA8XX_GPIO3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO4,
- .end = IRQ_DA8XX_GPIO4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO5,
- .end = IRQ_DA8XX_GPIO5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO6,
- .end = IRQ_DA8XX_GPIO6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO7,
- .end = IRQ_DA8XX_GPIO7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_GPIO8,
- .end = IRQ_DA8XX_GPIO8,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_MMCSDINT0,
- .end = IRQ_DA8XX_MMCSDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA850_MMCSDINT0_1,
- .end = IRQ_DA850_MMCSDINT0_1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* dsp irq */
- .start = IRQ_DA8XX_CHIPINT0,
- .end = IRQ_DA8XX_CHIPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* timer irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
{ /* alarm irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT0,
- .end = IRQ_DA8XX_SPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT1,
- .end = IRQ_DA8XX_SPINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA850_SATAINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_SATAINT),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_I2C,
+ .start = DAVINCI_INTC_IRQ(IRQ_I2C),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_IDE,
- .end = IRQ_IDE,
+ .start = DAVINCI_INTC_IRQ(IRQ_IDE),
+ .end = DAVINCI_INTC_IRQ(IRQ_IDE),
.flags = IORESOURCE_IRQ,
},
};
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_MMCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
.flags = IORESOURCE_IRQ,
}, {
/* different on dm355 */
- .start = IRQ_SDIOINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
.flags = IORESOURCE_IRQ,
},
};
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_DM355_MMCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
.flags = IORESOURCE_IRQ,
}, {
- .start = IRQ_DM355_SDIOINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
.flags = IORESOURCE_IRQ,
},
};
mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
- mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
+ mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT1);
davinci_mmcsd1_device.name = "da830-mmc";
} else
break;
if (cpu_is_davinci_dm355()) {
mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM355_SDIOINT0);
/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
davinci_cfg_reg(DM355_MMCSD0);
mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT0);
davinci_mmcsd0_device.name = "da830-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
struct davinci_timer_instance davinci_timer_instance[2] = {
{
.base = DAVINCI_TIMER0_BASE,
- .bottom_irq = IRQ_TINT0_TINT12,
- .top_irq = IRQ_TINT0_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
},
{
.base = DAVINCI_TIMER1_BASE,
- .bottom_irq = IRQ_TINT1_TINT12,
- .top_irq = IRQ_TINT1_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM355_SPINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SPINT0_0),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using (or muxing) TC*_ERR */
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
static struct resource dm355_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
static struct resource dm355_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM355_GPIOBNK0,
- .end = IRQ_DM355_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK1,
- .end = IRQ_DM355_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK2,
- .end = IRQ_DM355_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK3,
- .end = IRQ_DM355_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK4,
- .end = IRQ_DM355_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK5,
- .end = IRQ_DM355_GPIOBNK5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM355_GPIOBNK6,
- .end = IRQ_DM355_GPIOBNK6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
.flags = IORESOURCE_IRQ,
},
};
static struct plat_serial8250_port dm355_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port dm355_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port dm355_serial2_platform_data[] = {
{
.mapbase = DM355_UART2_BASE,
- .irq = IRQ_DM355_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM355_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_SPIINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_SPIINT0_0),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM365_GPIO0,
- .end = IRQ_DM365_GPIO0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO1,
- .end = IRQ_DM365_GPIO1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO2,
- .end = IRQ_DM365_GPIO2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO3,
- .end = IRQ_DM365_GPIO3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO4,
- .end = IRQ_DM365_GPIO4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO5,
- .end = IRQ_DM365_GPIO5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO6,
- .end = IRQ_DM365_GPIO6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_GPIO7,
- .end = IRQ_DM365_GPIO7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_EMAC_RXTHRESH,
- .end = IRQ_DM365_EMAC_RXTHRESH,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_RXPULSE,
- .end = IRQ_DM365_EMAC_RXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_TXPULSE,
- .end = IRQ_DM365_EMAC_TXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_MISCPULSE,
- .end = IRQ_DM365_EMAC_MISCPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_RTCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_RTCINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
/* interrupt */
- .start = IRQ_DM365_KEYINT,
- .end = IRQ_DM365_KEYINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
.flags = IORESOURCE_IRQ,
},
};
static struct plat_serial8250_port dm365_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port dm365_serial1_platform_data[] = {
{
.mapbase = DM365_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
static struct resource dm365_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
static struct resource dm365_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_EMACINT,
- .end = IRQ_EMACINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_EMACINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_EMACINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
static struct resource dm644x_vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
static struct resource dm644x_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_GPIOBNK0,
- .end = IRQ_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK1,
- .end = IRQ_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK2,
- .end = IRQ_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK3,
- .end = IRQ_GPIOBNK3,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_GPIOBNK4,
- .end = IRQ_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
.flags = IORESOURCE_IRQ,
},
};
static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
static struct plat_serial8250_port dm644x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM646X_EMACRXTHINT,
- .end = IRQ_DM646X_EMACRXTHINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACRXINT,
- .end = IRQ_DM646X_EMACRXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACTXINT,
- .end = IRQ_DM646X_EMACTXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACMISCINT,
- .end = IRQ_DM646X_EMACMISCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP0TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0TXINT),
.flags = IORESOURCE_IRQ,
},
{
.name = "rx",
- .start = IRQ_DM646X_MCASP0RXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0RXINT),
.flags = IORESOURCE_IRQ,
},
};
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP1TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP1TXINT),
.flags = IORESOURCE_IRQ,
},
};
static struct resource vpif_display_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT2,
- .end = IRQ_DM646X_VP_VERTINT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT3,
- .end = IRQ_DM646X_VP_VERTINT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
.flags = IORESOURCE_IRQ,
},
};
static struct resource vpif_capture_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT0,
- .end = IRQ_DM646X_VP_VERTINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT1,
- .end = IRQ_DM646X_VP_VERTINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM646X_GPIOBNK0,
- .end = IRQ_DM646X_GPIOBNK0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK1,
- .end = IRQ_DM646X_GPIOBNK1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_GPIOBNK2,
- .end = IRQ_DM646X_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
};
static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_DM646X_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM646X_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
#include <linux/types.h>
#include <linux/reboot.h>
+#define DAVINCI_INTC_START 0
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+
void davinci_timer_init(struct clk *clk);
extern void davinci_irq_init(void);
for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
davinci_irq_setup_gc(davinci_intc_base + j, irq_base + i, 32);
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
+ irq_set_handler(DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34), handle_level_irq);
set_handle_irq(davinci_handle_irq);
}
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_USB_INT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_USB_INT),
.flags = IORESOURCE_IRQ,
.name = "mc",
},
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_IRQN,
- .end = IRQ_DA8XX_IRQN,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
.flags = IORESOURCE_IRQ,
},
};
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_USBINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_USBINT),
.flags = IORESOURCE_IRQ,
.name = "mc"
},
if (cpu_is_davinci_dm646x()) {
/* Override the defaults as DM6467 uses different IRQs. */
- usb_dev.resource[1].start = IRQ_DM646X_USBINT;
- usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT;
+ usb_dev.resource[1].start = DAVINCI_INTC_IRQ(IRQ_DM646X_USBINT);
+ usb_dev.resource[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM646X_USBDMAINT);
} else /* other devices don't have dedicated CPPI IRQ */
usb_dev.num_resources = 2;