drm/amdgpu: Update mes_v11_api_def.h

Update MES API to support oversubscription without aggregated doorbell
for usermode queues.

v2: Change oversubscription_no_aggregated_en to is_kfd_process (align
with MES)

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
index 69a70a0..521e35d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
@@ -677,6 +677,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
        queue_input.wptr_addr = qprops->wptr_gpu_addr;
        queue_input.queue_type = qprops->queue_type;
        queue_input.paging = qprops->paging;
+       queue_input.is_kfd_process = 0;
 
        r = adev->mes.funcs->add_hw_queue(&adev->mes, &queue_input);
        if (r) {

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
index 9c11219..85ebb5f 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
@@ -214,6 +214,7 @@ struct mes_add_queue_input {
        uint32_t        gws_size;
        uint64_t        tba_addr;
        uint64_t        tma_addr;
+       uint32_t        is_kfd_process;
 };
 
 struct mes_remove_queue_input {

diff --git a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
index ead1860..7dfc6ea 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/mes_v11_0.c
@@ -165,6 +165,7 @@ static int mes_v11_0_add_hw_queue(struct amdgpu_mes *mes,
        mes_add_queue_pkt.gws_size = input->gws_size;
        mes_add_queue_pkt.trap_handler_addr = input->tba_addr;
        mes_add_queue_pkt.tma_addr = input->tma_addr;
+       mes_add_queue_pkt.is_kfd_process = input->is_kfd_process;
 
        mes_add_queue_pkt.api_status.api_completion_fence_addr =
                mes->ring.fence_drv.gpu_addr;
@@ -312,6 +313,7 @@ static int mes_v11_0_set_hw_resources(struct amdgpu_mes *mes)
        mes_set_hw_res_pkt.disable_reset = 1;
        mes_set_hw_res_pkt.disable_mes_log = 1;
        mes_set_hw_res_pkt.use_different_vmid_compute = 1;
+       mes_set_hw_res_pkt.oversubscription_timer = 50;
 
        mes_set_hw_res_pkt.api_status.api_completion_fence_addr =
                mes->ring.fence_drv.gpu_addr;

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index 299927a..74a1f8a 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -204,6 +204,8 @@ static int add_queue_mes(struct device_queue_manager *dqm, struct queue *q,
        } else
                queue_input.wptr_addr = (uint64_t)q->properties.write_ptr;
 
+       queue_input.is_kfd_process = 1;
+
        queue_input.paging = false;
        queue_input.tba_addr = qpd->tba_addr;
        queue_input.tma_addr = qpd->tma_addr;

diff --git a/drivers/gpu/drm/amd/include/mes_v11_api_def.h b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
index f9d02d7..fa1b9e0 100644 (file)
--- a/drivers/gpu/drm/amd/include/mes_v11_api_def.h
+++ b/drivers/gpu/drm/amd/include/mes_v11_api_def.h
@@ -226,6 +226,7 @@ union MESAPI_SET_HW_RESOURCES {
                        };
                        uint32_t        uint32_t_all;
                };
+               uint32_t        oversubscription_timer;
        };
 
        uint32_t        max_dwords_in_api[API_FRAME_SIZE_IN_DWORDS];
@@ -265,7 +266,8 @@ union MESAPI__ADD_QUEUE {
                        uint32_t is_gang_suspended      : 1;
                        uint32_t is_tmz_queue           : 1;
                        uint32_t map_kiq_utility_queue  : 1;
-                       uint32_t reserved               : 23;
+                       uint32_t is_kfd_process         : 1;
+                       uint32_t reserved               : 22;
                };
                struct MES_API_STATUS           api_status;
                uint64_t                        tma_addr;