perf riscv: Remove dwarf-regs.c and add dwarf-regs-table.h

The file just provides the function get_arch_regstr, however, if in
the only caller get_dwarf_regstr EM_HOST is used for the EM_NONE case,
and the register table is provided in a header file, the function can
never be called. So remove as dead code. Tidy up the EM_NONE cases for
riscv in dwarf-regs.c.

Reviewed-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
Signed-off-by: Ian Rogers <irogers@google.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Cc: Anup Patel <anup@brainfault.org>
Cc: Yang Jihong <yangjihong@bytedance.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Shenlin Liang <liangshenlin@eswincomputing.com>
Cc: Nick Terrell <terrelln@fb.com>
Cc: Guilherme Amadio <amadio@gentoo.org>
Cc: Steinar H. Gunderson <sesse@google.com>
Cc: Changbin Du <changbin.du@huawei.com>
Cc: Alexander Lobakin <aleksander.lobakin@intel.com>
Cc: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Cc: Huacai Chen <chenhuacai@kernel.org>
Cc: Guo Ren <guoren@kernel.org>
Cc: Masahiro Yamada <masahiroy@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: James Clark <james.clark@linaro.org>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Chen Pei <cp0613@linux.alibaba.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Oliver Upton <oliver.upton@linux.dev>
Cc: Aditya Gupta <adityag@linux.ibm.com>
Cc: Kajol Jain <kjain@linux.ibm.com>
Cc: Athira Rajeev <atrajeev@linux.vnet.ibm.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-riscv@lists.infradead.org
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Atish Patra <atishp@rivosinc.com>
Cc: Dima Kogan <dima@secretsauce.net>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Dr. David Alan Gilbert <linux@treblig.org>
Cc: linux-csky@vger.kernel.org
Link: https://lore.kernel.org/r/20241108234606.429459-15-irogers@google.com
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

diff --git a/tools/perf/arch/riscv/include/dwarf-regs-table.h b/tools/perf/arch/riscv/include/dwarf-regs-table.h
new file mode 100644 (file)
index 0000000..a45b63a
--- /dev/null
+++ b/tools/perf/arch/riscv/include/dwarf-regs-table.h
@@ -0,0 +1,42 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifdef DEFINE_DWARF_REGSTR_TABLE
+/* This is included in perf/util/dwarf-regs.c */
+
+#define REG_DWARFNUM_NAME(reg, idx)    [idx] = "%" #reg
+
+static const char * const riscv_regstr_tbl[] = {
+       REG_DWARFNUM_NAME("%zero", 0),
+       REG_DWARFNUM_NAME("%ra", 1),
+       REG_DWARFNUM_NAME("%sp", 2),
+       REG_DWARFNUM_NAME("%gp", 3),
+       REG_DWARFNUM_NAME("%tp", 4),
+       REG_DWARFNUM_NAME("%t0", 5),
+       REG_DWARFNUM_NAME("%t1", 6),
+       REG_DWARFNUM_NAME("%t2", 7),
+       REG_DWARFNUM_NAME("%s0", 8),
+       REG_DWARFNUM_NAME("%s1", 9),
+       REG_DWARFNUM_NAME("%a0", 10),
+       REG_DWARFNUM_NAME("%a1", 11),
+       REG_DWARFNUM_NAME("%a2", 12),
+       REG_DWARFNUM_NAME("%a3", 13),
+       REG_DWARFNUM_NAME("%a4", 14),
+       REG_DWARFNUM_NAME("%a5", 15),
+       REG_DWARFNUM_NAME("%a6", 16),
+       REG_DWARFNUM_NAME("%a7", 17),
+       REG_DWARFNUM_NAME("%s2", 18),
+       REG_DWARFNUM_NAME("%s3", 19),
+       REG_DWARFNUM_NAME("%s4", 20),
+       REG_DWARFNUM_NAME("%s5", 21),
+       REG_DWARFNUM_NAME("%s6", 22),
+       REG_DWARFNUM_NAME("%s7", 23),
+       REG_DWARFNUM_NAME("%s8", 24),
+       REG_DWARFNUM_NAME("%s9", 25),
+       REG_DWARFNUM_NAME("%s10", 26),
+       REG_DWARFNUM_NAME("%s11", 27),
+       REG_DWARFNUM_NAME("%t3", 28),
+       REG_DWARFNUM_NAME("%t4", 29),
+       REG_DWARFNUM_NAME("%t5", 30),
+       REG_DWARFNUM_NAME("%t6", 31),
+};
+
+#endif

diff --git a/tools/perf/arch/riscv/util/Build b/tools/perf/arch/riscv/util/Build
index 8f93091..58a6722 100644 (file)
--- a/tools/perf/arch/riscv/util/Build
+++ b/tools/perf/arch/riscv/util/Build
@@ -2,5 +2,4 @@ perf-util-y += perf_regs.o
 perf-util-y += header.o
 
 perf-util-$(CONFIG_LIBTRACEEVENT) += kvm-stat.o
-perf-util-$(CONFIG_LIBDW) += dwarf-regs.o
 perf-util-$(CONFIG_LIBDW_DWARF_UNWIND) += unwind-libdw.o

diff --git a/tools/perf/arch/riscv/util/dwarf-regs.c b/tools/perf/arch/riscv/util/dwarf-regs.c
deleted file mode 100644 (file)
index a9c4402..0000000
--- a/tools/perf/arch/riscv/util/dwarf-regs.c
+++ /dev/null
@@ -1,62 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0
-/*
- * Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
- * Mapping of DWARF debug register numbers into register names.
- */
-
-#include <stddef.h>
-#include <errno.h> /* for EINVAL */
-#include <string.h> /* for strcmp */
-#include <dwarf-regs.h>
-
-struct regs_dwarfnum {
-       const char *name;
-       unsigned int dwarfnum;
-};
-
-#define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
-#define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
-
-struct regs_dwarfnum riscv_dwarf_regs_table[] = {
-       REG_DWARFNUM_NAME("%zero", 0),
-       REG_DWARFNUM_NAME("%ra", 1),
-       REG_DWARFNUM_NAME("%sp", 2),
-       REG_DWARFNUM_NAME("%gp", 3),
-       REG_DWARFNUM_NAME("%tp", 4),
-       REG_DWARFNUM_NAME("%t0", 5),
-       REG_DWARFNUM_NAME("%t1", 6),
-       REG_DWARFNUM_NAME("%t2", 7),
-       REG_DWARFNUM_NAME("%s0", 8),
-       REG_DWARFNUM_NAME("%s1", 9),
-       REG_DWARFNUM_NAME("%a0", 10),
-       REG_DWARFNUM_NAME("%a1", 11),
-       REG_DWARFNUM_NAME("%a2", 12),
-       REG_DWARFNUM_NAME("%a3", 13),
-       REG_DWARFNUM_NAME("%a4", 14),
-       REG_DWARFNUM_NAME("%a5", 15),
-       REG_DWARFNUM_NAME("%a6", 16),
-       REG_DWARFNUM_NAME("%a7", 17),
-       REG_DWARFNUM_NAME("%s2", 18),
-       REG_DWARFNUM_NAME("%s3", 19),
-       REG_DWARFNUM_NAME("%s4", 20),
-       REG_DWARFNUM_NAME("%s5", 21),
-       REG_DWARFNUM_NAME("%s6", 22),
-       REG_DWARFNUM_NAME("%s7", 23),
-       REG_DWARFNUM_NAME("%s8", 24),
-       REG_DWARFNUM_NAME("%s9", 25),
-       REG_DWARFNUM_NAME("%s10", 26),
-       REG_DWARFNUM_NAME("%s11", 27),
-       REG_DWARFNUM_NAME("%t3", 28),
-       REG_DWARFNUM_NAME("%t4", 29),
-       REG_DWARFNUM_NAME("%t5", 30),
-       REG_DWARFNUM_NAME("%t6", 31),
-       REG_DWARFNUM_END,
-};
-
-#define RISCV_MAX_REGS ((sizeof(riscv_dwarf_regs_table) / \
-                sizeof(riscv_dwarf_regs_table[0])) - 1)
-
-const char *get_arch_regstr(unsigned int n)
-{
-       return (n < RISCV_MAX_REGS) ? riscv_dwarf_regs_table[n].name : NULL;
-}

diff --git a/tools/perf/util/dwarf-regs.c b/tools/perf/util/dwarf-regs.c
index 3d98c2b..2c6b197 100644 (file)
--- a/tools/perf/util/dwarf-regs.c
+++ b/tools/perf/util/dwarf-regs.c
@@ -20,6 +20,7 @@
 #include "../arch/arm64/include/dwarf-regs-table.h"
 #include "../arch/sh/include/dwarf-regs-table.h"
 #include "../arch/powerpc/include/dwarf-regs-table.h"
+#include "../arch/riscv/include/dwarf-regs-table.h"
 #include "../arch/s390/include/dwarf-regs-table.h"
 #include "../arch/sparc/include/dwarf-regs-table.h"
 #include "../arch/xtensa/include/dwarf-regs-table.h"
@@ -33,7 +34,7 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int
 {
 #if EM_HOST == EM_X86_64 || EM_HOST == EM_386 || EM_HOST == EM_AARCH64 || EM_HOST == EM_ARM \
     || EM_HOST == EM_CSKY || EM_HOST == EM_LOONGARCH || EM_HOST == EM_MIPS || EM_HOST == EM_PPC \
-    || EM_HOST == EM_PPC64
+    || EM_HOST == EM_PPC64 || EM_HOST == EM_RISCV
        if (machine == EM_NONE) {
                /* Generic arch - use host arch */
                machine = EM_HOST;
@@ -42,7 +43,7 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int
        switch (machine) {
 #if EM_HOST != EM_X86_64 && EM_HOST != EM_386 && EM_HOST != EM_AARCH64 && EM_HOST != EM_ARM \
     && EM_HOST != EM_CSKY && EM_HOST != EM_LOONGARCH && EM_HOST != EM_MIPS && EM_HOST != EM_PPC \
-    && EM_HOST != EM_PPC64
+    && EM_HOST != EM_PPC64 && EM_HOST != EM_RISCV
        case EM_NONE:   /* Generic arch - use host arch */
                return get_arch_regstr(n);
 #endif
@@ -63,6 +64,8 @@ const char *get_dwarf_regstr(unsigned int n, unsigned int machine, unsigned int
        case EM_PPC:
        case EM_PPC64:
                return __get_dwarf_regstr(powerpc_regstr_tbl, n);
+       case EM_RISCV:
+               return __get_dwarf_regstr(riscv_regstr_tbl, n);
        case EM_SPARC:
        case EM_SPARCV9:
                return __get_dwarf_regstr(sparc_regstr_tbl, n);

diff --git a/tools/perf/util/include/dwarf-regs.h b/tools/perf/util/include/dwarf-regs.h
index e47c469..28075de 100644 (file)
--- a/tools/perf/util/include/dwarf-regs.h
+++ b/tools/perf/util/include/dwarf-regs.h
@@ -91,7 +91,7 @@
 #ifdef HAVE_LIBDW_SUPPORT
 #if !defined(__x86_64__) && !defined(__i386__) && !defined(__aarch64__) && !defined(__arm__) \
     && !defined(__loongarch__) && !defined(__mips__) && !defined(__powerpc__) \
-    && !defined(__powerpc64__)
+    && !defined(__powerpc64__) && !defined(__riscv__)
 const char *get_arch_regstr(unsigned int n);
 #endif