clk: imx: imx93: add mcore_booted module paratemter

Add mcore_booted boot parameter which could simplify AMP clock
management. To i.MX93, there is CCM(clock control Module) to generate
clock root clock, anatop(analog PLL module) to generate PLL, and LPCG
(clock gating) to gate clocks to peripherals. As below:
anatop->ccm->lpcg->peripheral

Linux handles the clock management and the auxiliary core is under
control of Linux. Although there is per hardware domain control for LPCG
and CCM, auxiliary core normally only use LPCG hardware domain control
to avoid linux gate off the clk to peripherals and leave CCM ana anatop
to Linux.

Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230403095300.3386988-6-peng.fan@oss.nxp.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>

diff --git a/drivers/clk/imx/clk-composite-93.c b/drivers/clk/imx/clk-composite-93.c
index 74a66b0..81164bd 100644 (file)
--- a/drivers/clk/imx/clk-composite-93.c
+++ b/drivers/clk/imx/clk-composite-93.c
@@ -222,7 +222,7 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p
                hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
                                               mux_hw, &clk_mux_ro_ops, div_hw,
                                               &clk_divider_ro_ops, NULL, NULL, flags);
-       } else {
+       } else if (!mcore_booted) {
                gate = kzalloc(sizeof(*gate), GFP_KERNEL);
                if (!gate)
                        goto fail;
@@ -238,6 +238,12 @@ struct clk_hw *imx93_clk_composite_flags(const char *name, const char * const *p
                                               &imx93_clk_composite_divider_ops, gate_hw,
                                               &imx93_clk_composite_gate_ops,
                                               flags | CLK_SET_RATE_NO_REPARENT);
+       } else {
+               hw = clk_hw_register_composite(NULL, name, parent_names, num_parents,
+                                              mux_hw, &imx93_clk_composite_mux_ops, div_hw,
+                                              &imx93_clk_composite_divider_ops, NULL,
+                                              &imx93_clk_composite_gate_ops,
+                                              flags | CLK_SET_RATE_NO_REPARENT);
        }
 
        if (IS_ERR(hw))

diff --git a/drivers/clk/imx/clk-imx93.c b/drivers/clk/imx/clk-imx93.c
index 8d0974d..de1ed1d 100644 (file)
--- a/drivers/clk/imx/clk-imx93.c
+++ b/drivers/clk/imx/clk-imx93.c
@@ -352,6 +352,8 @@ static struct platform_driver imx93_clk_driver = {
        },
 };
 module_platform_driver(imx93_clk_driver);
+module_param(mcore_booted, bool, 0444);
+MODULE_PARM_DESC(mcore_booted, "See Cortex-M core is booted or not");
 
 MODULE_DESCRIPTION("NXP i.MX93 clock driver");
 MODULE_LICENSE("GPL v2");