DIG_CLK_CTL_D_MBHC_CLK_EN_MASK,
DIG_CLK_CTL_D_MBHC_CLK_EN);
- if (snd_soc_component_read32(component, CDC_A_MICB_2_EN) & CDC_A_MICB_2_EN_ENABLE)
+ if (snd_soc_component_read(component, CDC_A_MICB_2_EN) & CDC_A_MICB_2_EN_ENABLE)
micbias_enabled = true;
pm8916_mbhc_configure_bias(wcd, micbias_enabled);
snd_soc_component_init_regmap(component,
dev_get_regmap(component->dev->parent, NULL));
snd_soc_component_set_drvdata(component, priv);
- priv->pmic_rev = snd_soc_component_read32(component, CDC_D_REVISION1);
- priv->codec_version = snd_soc_component_read32(component, CDC_D_PERPH_SUBTYPE);
+ priv->pmic_rev = snd_soc_component_read(component, CDC_D_REVISION1);
+ priv->codec_version = snd_soc_component_read(component, CDC_D_PERPH_SUBTYPE);
dev_info(component->dev, "PMIC REV: %d\t CODEC Version: %d\n",
priv->pmic_rev, priv->codec_version);
if (priv->detect_accessory_type) {
struct snd_soc_component *component = priv->component;
- u32 val = snd_soc_component_read32(component, CDC_A_MBHC_RESULT_1);
+ u32 val = snd_soc_component_read(component, CDC_A_MBHC_RESULT_1);
/* check if its BTN0 thats released */
if ((val != -1) && !(val & CDC_A_MBHC_RESULT_1_BTN_RESULT_MASK))
struct snd_soc_component *component = priv->component;
u32 btn_result;
- btn_result = snd_soc_component_read32(component, CDC_A_MBHC_RESULT_1) &
+ btn_result = snd_soc_component_read(component, CDC_A_MBHC_RESULT_1) &
CDC_A_MBHC_RESULT_1_BTN_RESULT_MASK;
switch (btn_result) {
struct snd_soc_component *component = priv->component;
bool ins = false;
- if (snd_soc_component_read32(component, CDC_A_MBHC_DET_CTL_1) &
+ if (snd_soc_component_read(component, CDC_A_MBHC_DET_CTL_1) &
CDC_A_MBHC_DET_CTL_MECH_DET_TYPE_MASK)
ins = true;
if (ins) { /* hs insertion */
bool micbias_enabled = false;
- if (snd_soc_component_read32(component, CDC_A_MICB_2_EN) &
+ if (snd_soc_component_read(component, CDC_A_MICB_2_EN) &
CDC_A_MICB_2_EN_ENABLE)
micbias_enabled = true;
reg = LPASS_CDC_IIR1_GAIN_B1_CTL;
else if (w->shift == 1)
reg = LPASS_CDC_IIR2_GAIN_B1_CTL;
- value = snd_soc_component_read32(component, reg);
+ value = snd_soc_component_read(component, reg);
snd_soc_component_write(component, reg, value);
break;
default:
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t)) & 0x7F);
- value |= snd_soc_component_read32(component,
+ value |= snd_soc_component_read(component,
(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx));
snd_soc_component_write(component,
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t) + 1) & 0x7F);
- value |= (snd_soc_component_read32(component,
+ value |= (snd_soc_component_read(component,
(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 8);
snd_soc_component_write(component,
((band_idx * BAND_MAX + coeff_idx)
* sizeof(uint32_t) + 2) & 0x7F);
- value |= (snd_soc_component_read32(component,
+ value |= (snd_soc_component_read(component,
(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) << 16);
snd_soc_component_write(component,
* sizeof(uint32_t) + 3) & 0x7F);
/* Mask bits top 2 bits since they are reserved */
- value |= ((snd_soc_component_read32(component,
+ value |= ((snd_soc_component_read(component,
(LPASS_CDC_IIR1_COEF_B2_CTL + 64 * iir_idx)) & 0x3f) << 24);
return value;
/* apply the digital gain after the interpolator is enabled */
usleep_range(10000, 10100);
snd_soc_component_write(component, rx_gain_reg[w->shift],
- snd_soc_component_read32(component, rx_gain_reg[w->shift]));
+ snd_soc_component_read(component, rx_gain_reg[w->shift]));
break;
case SND_SOC_DAPM_POST_PMD:
snd_soc_component_update_bits(component, LPASS_CDC_CLK_RX_RESET_CTL,
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
TX_VOL_CTL_CFG_MUTE_EN_MASK,
TX_VOL_CTL_CFG_MUTE_EN_ENABLE);
- dec_hpf_cut_of_freq = snd_soc_component_read32(component, tx_mux_ctl_reg) &
+ dec_hpf_cut_of_freq = snd_soc_component_read(component, tx_mux_ctl_reg) &
TX_MUX_CTL_CUT_OFF_FREQ_MASK;
dec_hpf_cut_of_freq >>= TX_MUX_CTL_CUT_OFF_FREQ_SHIFT;
if (dec_hpf_cut_of_freq != TX_MUX_CTL_CF_NEG_3DB_150HZ) {
TX_MUX_CTL_HPF_BP_SEL_NO_BYPASS);
/* apply the digital gain after the decimator is enabled */
snd_soc_component_write(component, tx_gain_reg[w->shift],
- snd_soc_component_read32(component, tx_gain_reg[w->shift]));
+ snd_soc_component_read(component, tx_gain_reg[w->shift]));
snd_soc_component_update_bits(component, tx_vol_ctl_reg,
TX_VOL_CTL_CFG_MUTE_EN_MASK, 0);
break;