KVM: arm64: Refactor CPACR trap bit setting/clearing to use ELx format

When setting/clearing CPACR bits for EL0 and EL1, use the ELx
format of the bits, which covers both. This makes the code
clearer, and reduces the chances of accidentally missing a bit.

No functional change intended.

Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Fuad Tabba <tabba@google.com>
Link: https://lore.kernel.org/r/20240603122852.3923848-9-tabba@google.com
Signed-off-by: Marc Zyngier <maz@kernel.org>

diff --git a/arch/arm64/include/asm/el2_setup.h b/arch/arm64/include/asm/el2_setup.h
index e4546b2..fd87c4b 100644 (file)
--- a/arch/arm64/include/asm/el2_setup.h
+++ b/arch/arm64/include/asm/el2_setup.h
@@ -146,7 +146,7 @@
 /* Coprocessor traps */
 .macro __init_el2_cptr
        __check_hvhe .LnVHE_\@, x1
-       mov     x0, #(CPACR_EL1_FPEN_EL1EN | CPACR_EL1_FPEN_EL0EN)
+       mov     x0, #CPACR_ELx_FPEN
        msr     cpacr_el1, x0
        b       .Lskip_set_cptr_\@
 .LnVHE_\@:
@@ -277,7 +277,7 @@
 
        // (h)VHE case
        mrs     x0, cpacr_el1                   // Disable SVE traps
-       orr     x0, x0, #(CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN)
+       orr     x0, x0, #CPACR_ELx_ZEN
        msr     cpacr_el1, x0
        b       .Lskip_set_cptr_\@
 
@@ -298,7 +298,7 @@
 
        // (h)VHE case
        mrs     x0, cpacr_el1                   // Disable SME traps
-       orr     x0, x0, #(CPACR_EL1_SMEN_EL0EN | CPACR_EL1_SMEN_EL1EN)
+       orr     x0, x0, #CPACR_ELx_SMEN
        msr     cpacr_el1, x0
        b       .Lskip_set_cptr_sme_\@
 

diff --git a/arch/arm64/include/asm/kvm_emulate.h b/arch/arm64/include/asm/kvm_emulate.h
index 2d7a0bd..21650e7 100644 (file)
--- a/arch/arm64/include/asm/kvm_emulate.h
+++ b/arch/arm64/include/asm/kvm_emulate.h
@@ -632,17 +632,16 @@ static __always_inline u64 kvm_get_reset_cptr_el2(struct kvm_vcpu *vcpu)
        u64 val;
 
        if (has_vhe()) {
-               val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN |
-                      CPACR_EL1_ZEN_EL1EN);
+               val = (CPACR_ELx_FPEN | CPACR_EL1_ZEN_EL1EN);
                if (cpus_have_final_cap(ARM64_SME))
                        val |= CPACR_EL1_SMEN_EL1EN;
        } else if (has_hvhe()) {
-               val = (CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
+               val = CPACR_ELx_FPEN;
 
                if (!vcpu_has_sve(vcpu) || !guest_owns_fp_regs())
-                       val |= CPACR_EL1_ZEN_EL1EN | CPACR_EL1_ZEN_EL0EN;
+                       val |= CPACR_ELx_ZEN;
                if (cpus_have_final_cap(ARM64_SME))
-                       val |= CPACR_EL1_SMEN_EL1EN | CPACR_EL1_SMEN_EL0EN;
+                       val |= CPACR_ELx_SMEN;
        } else {
                val = CPTR_NVHE_EL2_RES1;
 

diff --git a/arch/arm64/kvm/fpsimd.c b/arch/arm64/kvm/fpsimd.c
index 1807d3a..eb21f29 100644 (file)
--- a/arch/arm64/kvm/fpsimd.c
+++ b/arch/arm64/kvm/fpsimd.c
@@ -161,9 +161,7 @@ void kvm_arch_vcpu_put_fp(struct kvm_vcpu *vcpu)
        if (has_vhe() && system_supports_sme()) {
                /* Also restore EL0 state seen on entry */
                if (vcpu_get_flag(vcpu, HOST_SME_ENABLED))
-                       sysreg_clear_set(CPACR_EL1, 0,
-                                        CPACR_EL1_SMEN_EL0EN |
-                                        CPACR_EL1_SMEN_EL1EN);
+                       sysreg_clear_set(CPACR_EL1, 0, CPACR_ELx_SMEN);
                else
                        sysreg_clear_set(CPACR_EL1,
                                         CPACR_EL1_SMEN_EL0EN,

diff --git a/arch/arm64/kvm/hyp/nvhe/pkvm.c b/arch/arm64/kvm/hyp/nvhe/pkvm.c
index ea67fcb..95cf185 100644 (file)
--- a/arch/arm64/kvm/hyp/nvhe/pkvm.c
+++ b/arch/arm64/kvm/hyp/nvhe/pkvm.c
@@ -65,7 +65,7 @@ static void pvm_init_traps_aa64pfr0(struct kvm_vcpu *vcpu)
        /* Trap SVE */
        if (!FIELD_GET(ARM64_FEATURE_MASK(ID_AA64PFR0_EL1_SVE), feature_ids)) {
                if (has_hvhe())
-                       cptr_clear |= CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN;
+                       cptr_clear |= CPACR_ELx_ZEN;
                else
                        cptr_set |= CPTR_EL2_TZ;
        }

diff --git a/arch/arm64/kvm/hyp/nvhe/switch.c b/arch/arm64/kvm/hyp/nvhe/switch.c
index bef74de..6af179c 100644 (file)
--- a/arch/arm64/kvm/hyp/nvhe/switch.c
+++ b/arch/arm64/kvm/hyp/nvhe/switch.c
@@ -48,15 +48,14 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
        val |= has_hvhe() ? CPACR_EL1_TTA : CPTR_EL2_TTA;
        if (cpus_have_final_cap(ARM64_SME)) {
                if (has_hvhe())
-                       val &= ~(CPACR_EL1_SMEN_EL1EN | CPACR_EL1_SMEN_EL0EN);
+                       val &= ~CPACR_ELx_SMEN;
                else
                        val |= CPTR_EL2_TSM;
        }
 
        if (!guest_owns_fp_regs()) {
                if (has_hvhe())
-                       val &= ~(CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN |
-                                CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN);
+                       val &= ~(CPACR_ELx_FPEN | CPACR_ELx_ZEN);
                else
                        val |= CPTR_EL2_TFP | CPTR_EL2_TZ;
 

diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c
index 2007357..8fbb6a2 100644 (file)
--- a/arch/arm64/kvm/hyp/vhe/switch.c
+++ b/arch/arm64/kvm/hyp/vhe/switch.c
@@ -93,8 +93,7 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
 
        val = read_sysreg(cpacr_el1);
        val |= CPACR_ELx_TTA;
-       val &= ~(CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN |
-                CPACR_EL1_SMEN_EL0EN | CPACR_EL1_SMEN_EL1EN);
+       val &= ~(CPACR_ELx_ZEN | CPACR_ELx_SMEN);
 
        /*
         * With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to
@@ -109,9 +108,9 @@ static void __activate_traps(struct kvm_vcpu *vcpu)
 
        if (guest_owns_fp_regs()) {
                if (vcpu_has_sve(vcpu))
-                       val |= CPACR_EL1_ZEN_EL0EN | CPACR_EL1_ZEN_EL1EN;
+                       val |= CPACR_ELx_ZEN;
        } else {
-               val &= ~(CPACR_EL1_FPEN_EL0EN | CPACR_EL1_FPEN_EL1EN);
+               val &= ~CPACR_ELx_FPEN;
                __activate_traps_fpsimd32(vcpu);
        }