net/mlx5e: Honor user choice of IPsec replay window size

Users can configure IPsec replay window size, but mlx5 driver didn't
honor their choice and set always 32bits. Fix assignment logic to
configure right size from the beginning.

Fixes: 7db21ef4566e ("net/mlx5e: Set IPsec replay sequence numbers")
Reviewed-by: Patrisious Haddad <phaddad@nvidia.com>
Signed-off-by: Leon Romanovsky <leonro@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
index 6554965..4028932 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
@@ -335,6 +335,27 @@ void mlx5e_ipsec_build_accel_xfrm_attrs(struct mlx5e_ipsec_sa_entry *sa_entry,
                attrs->replay_esn.esn = sa_entry->esn_state.esn;
                attrs->replay_esn.esn_msb = sa_entry->esn_state.esn_msb;
                attrs->replay_esn.overlap = sa_entry->esn_state.overlap;
+               switch (x->replay_esn->replay_window) {
+               case 32:
+                       attrs->replay_esn.replay_window =
+                               MLX5_IPSEC_ASO_REPLAY_WIN_32BIT;
+                       break;
+               case 64:
+                       attrs->replay_esn.replay_window =
+                               MLX5_IPSEC_ASO_REPLAY_WIN_64BIT;
+                       break;
+               case 128:
+                       attrs->replay_esn.replay_window =
+                               MLX5_IPSEC_ASO_REPLAY_WIN_128BIT;
+                       break;
+               case 256:
+                       attrs->replay_esn.replay_window =
+                               MLX5_IPSEC_ASO_REPLAY_WIN_256BIT;
+                       break;
+               default:
+                       WARN_ON(true);
+                       return;
+               }
        }
 
        attrs->dir = x->xso.dir;

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c
index a91f772..4e018fb 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec_offload.c
@@ -95,7 +95,7 @@ static void mlx5e_ipsec_packet_setup(void *obj, u32 pdn,
 
                if (attrs->dir == XFRM_DEV_OFFLOAD_IN) {
                        MLX5_SET(ipsec_aso, aso_ctx, window_sz,
-                                attrs->replay_esn.replay_window / 64);
+                                attrs->replay_esn.replay_window);
                        MLX5_SET(ipsec_aso, aso_ctx, mode,
                                 MLX5_IPSEC_ASO_REPLAY_PROTECTION);
                }

diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h
index 6f36314..90ca63f 100644 (file)
--- a/include/linux/mlx5/mlx5_ifc.h
+++ b/include/linux/mlx5/mlx5_ifc.h
@@ -12001,6 +12001,13 @@ enum {
        MLX5_IPSEC_ASO_INC_SN            = 0x2,
 };
 
+enum {
+       MLX5_IPSEC_ASO_REPLAY_WIN_32BIT  = 0x0,
+       MLX5_IPSEC_ASO_REPLAY_WIN_64BIT  = 0x1,
+       MLX5_IPSEC_ASO_REPLAY_WIN_128BIT = 0x2,
+       MLX5_IPSEC_ASO_REPLAY_WIN_256BIT = 0x3,
+};
+
 struct mlx5_ifc_ipsec_aso_bits {
        u8         valid[0x1];
        u8         reserved_at_201[0x1];