mips: ralink: mt7621: define MT7621_SYSC_BASE with __iomem

So that MT7621_SYSC_BASE can be used later in multiple functions without
needing to repeat this __iomem declaration each time

Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>

diff --git a/arch/mips/include/asm/mach-ralink/mt7621.h b/arch/mips/include/asm/mach-ralink/mt7621.h
index 6bbf082..79d5bb0 100644 (file)
--- a/arch/mips/include/asm/mach-ralink/mt7621.h
+++ b/arch/mips/include/asm/mach-ralink/mt7621.h
@@ -7,10 +7,12 @@
 #ifndef _MT7621_REGS_H_
 #define _MT7621_REGS_H_
 
+#define IOMEM(x)                       ((void __iomem *)(KSEG1ADDR(x)))
+
 #define MT7621_PALMBUS_BASE            0x1C000000
 #define MT7621_PALMBUS_SIZE            0x03FFFFFF
 
-#define MT7621_SYSC_BASE               0x1E000000
+#define MT7621_SYSC_BASE               IOMEM(0x1E000000)
 
 #define SYSC_REG_CHIP_NAME0            0x00
 #define SYSC_REG_CHIP_NAME1            0x04

diff --git a/arch/mips/ralink/mt7621.c b/arch/mips/ralink/mt7621.c
index fb0565b..17dbf28 100644 (file)
--- a/arch/mips/ralink/mt7621.c
+++ b/arch/mips/ralink/mt7621.c
@@ -126,7 +126,6 @@ static void soc_dev_init(struct ralink_soc_info *soc_info, u32 rev)
 
 void __init prom_soc_init(struct ralink_soc_info *soc_info)
 {
-       void __iomem *sysc = (void __iomem *) KSEG1ADDR(MT7621_SYSC_BASE);
        unsigned char *name = NULL;
        u32 n0;
        u32 n1;
@@ -154,8 +153,8 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
                __sync();
        }
 
-       n0 = __raw_readl(sysc + SYSC_REG_CHIP_NAME0);
-       n1 = __raw_readl(sysc + SYSC_REG_CHIP_NAME1);
+       n0 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME0);
+       n1 = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_NAME1);
 
        if (n0 == MT7621_CHIP_NAME0 && n1 == MT7621_CHIP_NAME1) {
                name = "MT7621";
@@ -164,7 +163,7 @@ void __init prom_soc_init(struct ralink_soc_info *soc_info)
                panic("mt7621: unknown SoC, n0:%08x n1:%08x\n", n0, n1);
        }
        ralink_soc = MT762X_SOC_MT7621AT;
-       rev = __raw_readl(sysc + SYSC_REG_CHIP_REV);
+       rev = __raw_readl(MT7621_SYSC_BASE + SYSC_REG_CHIP_REV);
 
        snprintf(soc_info->sys_type, RAMIPS_SYS_TYPE_LEN,
                "MediaTek %s ver:%u eco:%u",