clk: qcom: rcg2: Make hw_clk_ctrl toggleable
authorKonrad Dybcio <konrad.dybcio@linaro.org>
Wed, 17 May 2023 16:40:39 +0000 (18:40 +0200)
committerBjorn Andersson <andersson@kernel.org>
Sat, 27 May 2023 01:22:58 +0000 (18:22 -0700)
Certain SoCs use the HW_CLK_CTRL feature on some of the clocks they
host. This allows the clocks to be turned on automatically when a
downstream branch tries to change rate or config.

Make it togglable so that we can utilize this.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230517-topic-waipio-gpucc-v1-2-4f40e282af1d@linaro.org
drivers/clk/qcom/clk-rcg.h
drivers/clk/qcom/clk-rcg2.c

index 01581f4..e6d84c8 100644 (file)
@@ -141,6 +141,7 @@ extern const struct clk_ops clk_dyn_rcg_ops;
  * @clkr: regmap clock handle
  * @cfg_off: defines the cfg register offset from the CMD_RCGR + CFG_REG
  * @parked_cfg: cached value of the CFG register for parked RCGs
+ * @hw_clk_ctrl: whether to enable hardware clock control
  */
 struct clk_rcg2 {
        u32                     cmd_rcgr;
@@ -152,6 +153,7 @@ struct clk_rcg2 {
        struct clk_regmap       clkr;
        u8                      cfg_off;
        u32                     parked_cfg;
+       bool                    hw_clk_ctrl;
 };
 
 #define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)
index 7655153..e22baf3 100644 (file)
@@ -325,6 +325,8 @@ static int __clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f,
        cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;
        if (rcg->mnd_width && f->n && (f->m != f->n))
                cfg |= CFG_MODE_DUAL_EDGE;
+       if (rcg->hw_clk_ctrl)
+               cfg |= CFG_HW_CLK_CTRL_MASK;
 
        *_cfg &= ~mask;
        *_cfg |= cfg;