arm64: dts: qcom: qrb4210-rb2: enable USB-C port handling

Plug in USB-C related bits and pieces to enable USB role switching and
USB-C orientation handling for the Qualcomm RB2 board.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240130-pmi632-typec-v3-6-b05fe44f0a51@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
index 52f31f3..696d6d4 100644 (file)
--- a/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
+++ b/arch/arm64/boot/dts/qcom/qrb4210-rb2.dts
@@ -6,8 +6,10 @@
 /dts-v1/;
 
 #include <dt-bindings/leds/common.h>
+#include <dt-bindings/usb/pd.h>
 #include "sm4250.dtsi"
 #include "pm6125.dtsi"
+#include "pmi632.dtsi"
 
 / {
        model = "Qualcomm Technologies, Inc. QRB4210 RB2";
@@ -256,6 +258,46 @@
        };
 };
 
+&pmi632_typec {
+       status = "okay";
+
+       connector {
+               compatible = "usb-c-connector";
+
+               power-role = "dual";
+               data-role = "dual";
+               self-powered;
+
+               typec-power-opmode = "default";
+               pd-disable;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+                               pmi632_hs_in: endpoint {
+                                       remote-endpoint = <&usb_dwc3_hs>;
+                               };
+                       };
+
+                       port@1 {
+                               reg = <1>;
+                               pmi632_ss_in: endpoint {
+                                       remote-endpoint = <&usb_qmpphy_out>;
+                               };
+                       };
+               };
+       };
+};
+
+&pmi632_vbus {
+       regulator-min-microamp = <500000>;
+       regulator-max-microamp = <3000000>;
+       status = "okay";
+};
+
 &pon_pwrkey {
        status = "okay";
 };
@@ -607,6 +649,10 @@
        status = "okay";
 };
 
+&usb_dwc3_hs {
+       remote-endpoint = <&pmi632_hs_in>;
+};
+
 &usb_hsphy {
        vdd-supply = <&vreg_l4a_0p9>;
        vdda-pll-supply = <&vreg_l12a_1p8>;
@@ -622,6 +668,10 @@
        status = "okay";
 };
 
+&usb_qmpphy_out {
+       remote-endpoint = <&pmi632_ss_in>;
+};
+
 &wifi {
        vdd-0.8-cx-mx-supply = <&vreg_l8a_0p664>;
        vdd-1.8-xo-supply = <&vreg_l16a_1p3>;

diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi
index 1f388b0..8eddb9a 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm6115.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi
@@ -1213,8 +1213,29 @@
                        reset-names = "ufsphy";
 
                        #phy-cells = <0>;
+                       orientation-switch;
 
                        status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+
+                                       usb_qmpphy_out: endpoint {
+                                       };
+                               };
+
+                               port@1 {
+                                       reg = <1>;
+
+                                       usb_qmpphy_usb_ss_in: endpoint {
+                                               remote-endpoint = <&usb_dwc3_ss>;
+                                       };
+                               };
+                       };
                };
 
                gpi_dma0: dma-controller@4a00000 {
@@ -1631,6 +1652,28 @@
                                snps,has-lpm-erratum;
                                snps,hird-threshold = /bits/ 8 <0x10>;
                                snps,usb3_lpm_capable;
+
+                               usb-role-switch;
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       port@0 {
+                                               reg = <0>;
+
+                                               usb_dwc3_hs: endpoint {
+                                               };
+                                       };
+
+                                       port@1 {
+                                               reg = <1>;
+
+                                               usb_dwc3_ss: endpoint {
+                                                       remote-endpoint = <&usb_qmpphy_usb_ss_in>;
+                                               };
+                                       };
+                               };
                        };
                };