clk: hi3660: Mark clk_gate_ufs_subsys as critical
authorLeo Yan <leo.yan@linaro.org>
Wed, 20 Mar 2019 10:05:08 +0000 (18:05 +0800)
committerStephen Boyd <sboyd@kernel.org>
Fri, 19 Apr 2019 22:20:35 +0000 (15:20 -0700)
clk_gate_ufs_subsys is a system bus clock, turning off it will
introduce lockup issue during system suspend flow.  Let's mark
clk_gate_ufs_subsys as critical clock, thus keeps it on during
system suspend and resume.

Fixes: d374e6fd5088 ("clk: hisilicon: Add clock driver for hi3660 SoC")
Cc: stable@vger.kernel.org
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Suggested-by: Dong Zhang <zhangdong46@hisilicon.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
drivers/clk/hisilicon/clk-hi3660.c

index f404199..794eeff 100644 (file)
@@ -163,8 +163,12 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
          "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 17, 0, },
        { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",
          "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },
+       /*
+        * clk_gate_ufs_subsys is a system bus clock, mark it as critical
+        * clock and keep it on for system suspend and resume.
+        */
        { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
-         CLK_SET_RATE_PARENT, 0x50, 21, 0, },
+         CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0x50, 21, 0, },
        { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
          CLK_SET_RATE_PARENT, 0x50, 28, 0, },
        { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",