arm64: dts: imx8mn: Add SAI nodes

The i.MX8M Nano has several SAI nodes available to it.
Enable them.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index 412e4a7..bc80b02 100644 (file)
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -260,6 +260,78 @@
                                reg = <0x30000000 0x100000>;
                                ranges;
 
+                               sai2: sai@30020000 {
+                                       compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+                                       reg = <0x30020000 0x10000>;
+                                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
+                                               <&clk IMX8MN_CLK_DUMMY>,
+                                               <&clk IMX8MN_CLK_SAI2_ROOT>,
+                                               <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+                                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                                       dmas = <&sdma2 2 2 0>, <&sdma2 3 2 0>;
+                                       dma-names = "rx", "tx";
+                                       status = "disabled";
+                               };
+
+                               sai3: sai@30030000 {
+                                       compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+                                       reg = <0x30030000 0x10000>;
+                                       interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
+                                                <&clk IMX8MN_CLK_DUMMY>,
+                                                <&clk IMX8MN_CLK_SAI3_ROOT>,
+                                                <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+                                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                                       dmas = <&sdma2 4 2 0>, <&sdma2 5 2 0>;
+                                       dma-names = "rx", "tx";
+                                       status = "disabled";
+                               };
+
+                               sai5: sai@30050000 {
+                                       compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+                                       reg = <0x30050000 0x10000>;
+                                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
+                                                <&clk IMX8MN_CLK_DUMMY>,
+                                                <&clk IMX8MN_CLK_SAI5_ROOT>,
+                                                <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+                                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                                       dmas = <&sdma2 8 2 0>, <&sdma2 9 2 0>;
+                                       dma-names = "rx", "tx";
+                                       fsl,shared-interrupt;
+                                       fsl,dataline = <0 0xf 0xf>;
+                                       status = "disabled";
+                               };
+
+                               sai6: sai@30060000 {
+                                       compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+                                       reg = <0x30060000  0x10000>;
+                                       interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
+                                                <&clk IMX8MN_CLK_DUMMY>,
+                                                <&clk IMX8MN_CLK_SAI6_ROOT>,
+                                                <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+                                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                                       dmas = <&sdma2 10 2 0>, <&sdma2 11 2 0>;
+                                       dma-names = "rx", "tx";
+                                       status = "disabled";
+                               };
+
+                               sai7: sai@300b0000 {
+                                       compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai";
+                                       reg = <0x300b0000 0x10000>;
+                                       interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+                                       clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
+                                                <&clk IMX8MN_CLK_DUMMY>,
+                                                <&clk IMX8MN_CLK_SAI7_ROOT>,
+                                                <&clk IMX8MN_CLK_DUMMY>, <&clk IMX8MN_CLK_DUMMY>;
+                                       clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3";
+                                       dmas = <&sdma2 12 2 0>, <&sdma2 13 2 0>;
+                                       dma-names = "rx", "tx";
+                                       status = "disabled";
+                               };
+
                                easrc: easrc@300c0000 {
                                        compatible = "fsl,imx8mn-easrc";
                                        reg = <0x300c0000 0x10000>;