int sh_clk_div4_reparent_register(struct clk *clks, int nr,
struct clk_div4_table *table);
-#define SH_CLK_DIV6(_name, _parent, _reg, _flags) \
-{ \
- .name = _name, \
- .parent = _parent, \
- .enable_reg = (void __iomem *)_reg, \
- .flags = _flags, \
+#define SH_CLK_DIV6(_parent, _reg, _flags) \
+{ \
+ .parent = _parent, \
+ .enable_reg = (void __iomem *)_reg, \
+ .flags = _flags, \
}
int sh_clk_div6_register(struct clk *clks, int nr);
enum { DIV6_V, DIV6_NR };
struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+ [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
};
#define MSTP(_str, _parent, _reg, _bit, _flags) \
enum { DIV6_V, DIV6_NR };
struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+ [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
};
#define MSTP(_str, _parent, _reg, _bit, _flags) \
enum { DIV6_V, DIV6_NR };
struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+ [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
};
static struct clk mstp_clks[HWBLK_NR] = {
enum { DIV6_V, DIV6_NR };
struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
+ [DIV6_V] = SH_CLK_DIV6(&pll_clk, VCLKCR, 0),
};
static struct clk mstp_clks[] = {
enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR };
-#define DIV6(_str, _reg, _flags) \
- SH_CLK_DIV6(_str, &div3_clk, _reg, _flags)
-
struct clk div6_clks[DIV6_NR] = {
- [DIV6_V] = DIV6("video_clk", VCLKCR, 0),
- [DIV6_FA] = DIV6("fsia_clk", FCLKACR, 0),
- [DIV6_FB] = DIV6("fsib_clk", FCLKBCR, 0),
- [DIV6_I] = DIV6("irda_clk", IRDACLKCR, 0),
- [DIV6_S] = DIV6("spu_clk", SPUCLKCR, CLK_ENABLE_ON_INIT),
+ [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0),
+ [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0),
+ [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
+ [DIV6_I] = SH_CLK_DIV6(&div3_clk, IRDACLKCR, 0),
+ [DIV6_S] = SH_CLK_DIV6(&div3_clk, SPUCLKCR, CLK_ENABLE_ON_INIT),
};
static struct clk mstp_clks[HWBLK_NR] = {