drm/nouveau/kms/nv140-: Don't modify depth in state during atomic commit

Currently, we modify the depth value stored in the atomic state when
performing a commit in order to workaround the fact we haven't
implemented support for depths higher then 10 yet. This isn't idempotent
though, as it will happen every atomic commit where we modify the OR
state even if the head's depth in the atomic state hasn't been modified.

Normally this wouldn't matter, since we don't modify OR state outside of
modesets, but since the CRC capture region is implemented as part of the
OR state in hardware we'll want to make sure all commits modifying OR
state are idempotent so as to avoid changing the depth unexpectedly.

So, fix this by simply not writing the reduced depth value we come up
with to the atomic state.

Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Dave Airlie <airlied@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200627194657.156514-5-lyude@redhat.com

diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
index 4a9a32b..9ef3c60 100644 (file)
--- a/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/headc37d.c
@@ -27,17 +27,20 @@ static void
 headc37d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
 {
        struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
+       u8 depth;
        u32 *push;
+
        if ((push = evo_wait(core, 2))) {
                /*XXX: This is a dirty hack until OR depth handling is
                 *     improved later for deep colour etc.
                 */
                switch (asyh->or.depth) {
-               case 6: asyh->or.depth = 5; break;
-               case 5: asyh->or.depth = 4; break;
-               case 2: asyh->or.depth = 1; break;
-               case 0: asyh->or.depth = 4; break;
+               case 6: depth = 5; break;
+               case 5: depth = 4; break;
+               case 2: depth = 1; break;
+               case 0: depth = 4; break;
                default:
+                       depth = asyh->or.depth;
                        WARN_ON(1);
                        break;
                }

diff --git a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
index 859131a..97141eb 100644 (file)
--- a/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/headc57d.c
@@ -27,17 +27,20 @@ static void
 headc57d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
 {
        struct nv50_dmac *core = &nv50_disp(head->base.base.dev)->core->chan;
+       u8 depth;
        u32 *push;
+
        if ((push = evo_wait(core, 2))) {
                /*XXX: This is a dirty hack until OR depth handling is
                 *     improved later for deep colour etc.
                 */
                switch (asyh->or.depth) {
-               case 6: asyh->or.depth = 5; break;
-               case 5: asyh->or.depth = 4; break;
-               case 2: asyh->or.depth = 1; break;
-               case 0: asyh->or.depth = 4; break;
+               case 6: depth = 5; break;
+               case 5: depth = 4; break;
+               case 2: depth = 1; break;
+               case 0: depth = 4; break;
                default:
+                       depth = asyh->or.depth;
                        WARN_ON(1);
                        break;
                }