drm/i915: Sort HSW PCI IDs
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 16 Jul 2020 17:20:59 +0000 (20:20 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 20 Oct 2020 17:44:17 +0000 (20:44 +0300)
Sort the HSW PCI IDs numerically. Some order seems better than
randomness.

Cc: Alexei Podtelezhnikov <apodtele@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200716172106.2656-8-ville.syrjala@linux.intel.com
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
include/drm/i915_pciids.h

index 6f870dc..ae3bd51 100644 (file)
 
 #define INTEL_HSW_ULT_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0A02, info), /* ULT GT1 desktop */ \
+       INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0A0A, info), /* ULT GT1 server */ \
-       INTEL_VGA_DEVICE(0x0A0B, info), /* ULT GT1 reserved */ \
-       INTEL_VGA_DEVICE(0x0A06, info)  /* ULT GT1 mobile */
+       INTEL_VGA_DEVICE(0x0A0B, info)  /* ULT GT1 reserved */
 
 #define INTEL_HSW_ULX_GT1_IDS(info) \
        INTEL_VGA_DEVICE(0x0A0E, info) /* ULX GT1 mobile */
        INTEL_HSW_ULT_GT1_IDS(info), \
        INTEL_HSW_ULX_GT1_IDS(info), \
        INTEL_VGA_DEVICE(0x0402, info), /* GT1 desktop */ \
+       INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
        INTEL_VGA_DEVICE(0x040A, info), /* GT1 server */ \
        INTEL_VGA_DEVICE(0x040B, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x040E, info), /* GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C02, info), /* SDV GT1 desktop */ \
+       INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
        INTEL_VGA_DEVICE(0x0C0A, info), /* SDV GT1 server */ \
        INTEL_VGA_DEVICE(0x0C0B, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0C0E, info), /* SDV GT1 reserved */ \
        INTEL_VGA_DEVICE(0x0D02, info), /* CRW GT1 desktop */ \
+       INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */    \
        INTEL_VGA_DEVICE(0x0D0A, info), /* CRW GT1 server */ \
        INTEL_VGA_DEVICE(0x0D0B, info), /* CRW GT1 reserved */ \
-       INTEL_VGA_DEVICE(0x0D0E, info), /* CRW GT1 reserved */ \
-       INTEL_VGA_DEVICE(0x0406, info), /* GT1 mobile */ \
-       INTEL_VGA_DEVICE(0x0C06, info), /* SDV GT1 mobile */ \
-       INTEL_VGA_DEVICE(0x0D06, info)  /* CRW GT1 mobile */
+       INTEL_VGA_DEVICE(0x0D0E, info)  /* CRW GT1 reserved */
 
 #define INTEL_HSW_ULT_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0A12, info), /* ULT GT2 desktop */ \
+       INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */    \
        INTEL_VGA_DEVICE(0x0A1A, info), /* ULT GT2 server */ \
-       INTEL_VGA_DEVICE(0x0A1B, info), /* ULT GT2 reserved */ \
-       INTEL_VGA_DEVICE(0x0A16, info)  /* ULT GT2 mobile */
+       INTEL_VGA_DEVICE(0x0A1B, info)  /* ULT GT2 reserved */ \
 
 #define INTEL_HSW_ULX_GT2_IDS(info) \
        INTEL_VGA_DEVICE(0x0A1E, info) /* ULX GT2 mobile */ \
        INTEL_HSW_ULT_GT2_IDS(info), \
        INTEL_HSW_ULX_GT2_IDS(info), \
        INTEL_VGA_DEVICE(0x0412, info), /* GT2 desktop */ \
+       INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
        INTEL_VGA_DEVICE(0x041A, info), /* GT2 server */ \
        INTEL_VGA_DEVICE(0x041B, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x041E, info), /* GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C12, info), /* SDV GT2 desktop */ \
+       INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0C1A, info), /* SDV GT2 server */ \
        INTEL_VGA_DEVICE(0x0C1B, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0C1E, info), /* SDV GT2 reserved */ \
        INTEL_VGA_DEVICE(0x0D12, info), /* CRW GT2 desktop */ \
+       INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
        INTEL_VGA_DEVICE(0x0D1A, info), /* CRW GT2 server */ \
        INTEL_VGA_DEVICE(0x0D1B, info), /* CRW GT2 reserved */ \
-       INTEL_VGA_DEVICE(0x0D1E, info), /* CRW GT2 reserved */ \
-       INTEL_VGA_DEVICE(0x0416, info), /* GT2 mobile */ \
-       INTEL_VGA_DEVICE(0x0C16, info), /* SDV GT2 mobile */ \
-       INTEL_VGA_DEVICE(0x0D16, info)  /* CRW GT2 mobile */
+       INTEL_VGA_DEVICE(0x0D1E, info)  /* CRW GT2 reserved */
 
 #define INTEL_HSW_ULT_GT3_IDS(info) \
        INTEL_VGA_DEVICE(0x0A22, info), /* ULT GT3 desktop */ \
+       INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A2A, info), /* ULT GT3 server */ \
        INTEL_VGA_DEVICE(0x0A2B, info), /* ULT GT3 reserved */ \
-       INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0A2E, info)  /* ULT GT3 reserved */
 
 #define INTEL_HSW_GT3_IDS(info) \
        INTEL_HSW_ULT_GT3_IDS(info), \
        INTEL_VGA_DEVICE(0x0422, info), /* GT3 desktop */ \
+       INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
        INTEL_VGA_DEVICE(0x042A, info), /* GT3 server */ \
        INTEL_VGA_DEVICE(0x042B, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x042E, info), /* GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C22, info), /* SDV GT3 desktop */ \
+       INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0C2A, info), /* SDV GT3 server */ \
        INTEL_VGA_DEVICE(0x0C2B, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0C2E, info), /* SDV GT3 reserved */ \
        INTEL_VGA_DEVICE(0x0D22, info), /* CRW GT3 desktop */ \
+       INTEL_VGA_DEVICE(0x0D26, info), /* CRW GT3 mobile */ \
        INTEL_VGA_DEVICE(0x0D2A, info), /* CRW GT3 server */ \
        INTEL_VGA_DEVICE(0x0D2B, info), /* CRW GT3 reserved */ \
-       INTEL_VGA_DEVICE(0x0D2E, info), /* CRW GT3 reserved */ \
-       INTEL_VGA_DEVICE(0x0426, info), /* GT3 mobile */ \
-       INTEL_VGA_DEVICE(0x0C26, info), /* SDV GT3 mobile */ \
-       INTEL_VGA_DEVICE(0x0D26, info)  /* CRW GT3 mobile */
+       INTEL_VGA_DEVICE(0x0D2E, info)  /* CRW GT3 reserved */
 
 #define INTEL_HSW_IDS(info) \
        INTEL_HSW_GT1_IDS(info), \