drm/amd/powerplay: support mclk socclk limit value set for sienna_cichlid.

Add support to force and unforce MCLK or SOCCLK to dpm limit value.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
index 667c912..ef8532f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
@@ -945,6 +945,8 @@ static int sienna_cichlid_force_dpm_limit_value(struct smu_context *smu, bool hi
 
        enum smu_clk_type clks[] = {
                SMU_GFXCLK,
+               SMU_MCLK,
+               SMU_SOCCLK,
        };
 
        for (i = 0; i < ARRAY_SIZE(clks); i++) {
@@ -970,6 +972,8 @@ static int sienna_cichlid_unforce_dpm_levels(struct smu_context *smu)
 
        enum smu_clk_type clks[] = {
                SMU_GFXCLK,
+               SMU_MCLK,
+               SMU_SOCCLK,
        };
 
        for (i = 0; i < ARRAY_SIZE(clks); i++) {