net/mlx5: Accel, Add core IPsec support for the Connect-X family
authorRaed Salem <raeds@mellanox.com>
Mon, 18 Nov 2019 12:30:20 +0000 (14:30 +0200)
committerSaeed Mahameed <saeedm@mellanox.com>
Thu, 16 Jul 2020 23:36:42 +0000 (16:36 -0700)
This to set the base for downstream patches to support
the new IPsec implementation of the Connect-X family.

Following modifications made:
- Remove accel layer dependency from MLX5_FPGA_IPSEC.
- Introduce accel_ipsec_ops, each IPsec device will
  have to support these ops.

Signed-off-by: Raed Salem <raeds@mellanox.com>
Reviewed-by: Tariq Toukan <tariqt@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/accel/ipsec.h
drivers/net/ethernet/mellanox/mlx5/core/en_accel/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.c
drivers/net/ethernet/mellanox/mlx5/core/fpga/ipsec.h
drivers/net/ethernet/mellanox/mlx5/core/main.c
include/linux/mlx5/accel.h
include/linux/mlx5/driver.h

index 8a4985d..628c888 100644 (file)
  *
  */
 
-#ifdef CONFIG_MLX5_FPGA_IPSEC
-
 #include <linux/mlx5/device.h>
 
 #include "accel/ipsec.h"
 #include "mlx5_core.h"
 #include "fpga/ipsec.h"
 
+void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
+{
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mlx5_fpga_ipsec_ops(mdev);
+       int err = 0;
+
+       if (!ipsec_ops || !ipsec_ops->init) {
+               mlx5_core_dbg(mdev, "IPsec ops is not supported\n");
+               return;
+       }
+
+       err = ipsec_ops->init(mdev);
+       if (err) {
+               mlx5_core_warn_once(mdev, "Failed to start IPsec device, err = %d\n", err);
+               return;
+       }
+
+       mdev->ipsec_ops = ipsec_ops;
+}
+
+void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
+{
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->cleanup)
+               return;
+
+       ipsec_ops->cleanup(mdev);
+}
+
 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev)
 {
-       return mlx5_fpga_ipsec_device_caps(mdev);
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->device_caps)
+               return 0;
+
+       return ipsec_ops->device_caps(mdev);
 }
 EXPORT_SYMBOL_GPL(mlx5_accel_ipsec_device_caps);
 
 unsigned int mlx5_accel_ipsec_counters_count(struct mlx5_core_dev *mdev)
 {
-       return mlx5_fpga_ipsec_counters_count(mdev);
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->counters_count)
+               return -EOPNOTSUPP;
+
+       return ipsec_ops->counters_count(mdev);
 }
 
 int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
                                   unsigned int count)
 {
-       return mlx5_fpga_ipsec_counters_read(mdev, counters, count);
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->counters_read)
+               return -EOPNOTSUPP;
+
+       return ipsec_ops->counters_read(mdev, counters, count);
 }
 
 void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
                                       struct mlx5_accel_esp_xfrm *xfrm,
                                       u32 *sa_handle)
 {
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
        __be32 saddr[4] = {}, daddr[4] = {};
 
+       if (!ipsec_ops || !ipsec_ops->create_hw_context)
+               return  ERR_PTR(-EOPNOTSUPP);
+
        if (!xfrm->attrs.is_ipv6) {
                saddr[3] = xfrm->attrs.saddr.a4;
                daddr[3] = xfrm->attrs.daddr.a4;
@@ -70,29 +116,18 @@ void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
                memcpy(daddr, xfrm->attrs.daddr.a6, sizeof(daddr));
        }
 
-       return mlx5_fpga_ipsec_create_sa_ctx(mdev, xfrm, saddr,
-                                            daddr, xfrm->attrs.spi,
-                                            xfrm->attrs.is_ipv6, sa_handle);
+       return ipsec_ops->create_hw_context(mdev, xfrm, saddr, daddr, xfrm->attrs.spi,
+                                           xfrm->attrs.is_ipv6, sa_handle);
 }
 
-void mlx5_accel_esp_free_hw_context(void *context)
+void mlx5_accel_esp_free_hw_context(struct mlx5_core_dev *mdev, void *context)
 {
-       mlx5_fpga_ipsec_delete_sa_ctx(context);
-}
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
 
-int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
-{
-       return mlx5_fpga_ipsec_init(mdev);
-}
-
-void mlx5_accel_ipsec_build_fs_cmds(void)
-{
-       mlx5_fpga_ipsec_build_fs_cmds();
-}
+       if (!ipsec_ops || !ipsec_ops->free_hw_context)
+               return;
 
-void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
-{
-       mlx5_fpga_ipsec_cleanup(mdev);
+       ipsec_ops->free_hw_context(context);
 }
 
 struct mlx5_accel_esp_xfrm *
@@ -100,9 +135,13 @@ mlx5_accel_esp_create_xfrm(struct mlx5_core_dev *mdev,
                           const struct mlx5_accel_esp_xfrm_attrs *attrs,
                           u32 flags)
 {
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = mdev->ipsec_ops;
        struct mlx5_accel_esp_xfrm *xfrm;
 
-       xfrm = mlx5_fpga_esp_create_xfrm(mdev, attrs, flags);
+       if (!ipsec_ops || !ipsec_ops->esp_create_xfrm)
+               return ERR_PTR(-EOPNOTSUPP);
+
+       xfrm = ipsec_ops->esp_create_xfrm(mdev, attrs, flags);
        if (IS_ERR(xfrm))
                return xfrm;
 
@@ -113,15 +152,23 @@ EXPORT_SYMBOL_GPL(mlx5_accel_esp_create_xfrm);
 
 void mlx5_accel_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
 {
-       mlx5_fpga_esp_destroy_xfrm(xfrm);
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = xfrm->mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->esp_destroy_xfrm)
+               return;
+
+       ipsec_ops->esp_destroy_xfrm(xfrm);
 }
 EXPORT_SYMBOL_GPL(mlx5_accel_esp_destroy_xfrm);
 
 int mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
                               const struct mlx5_accel_esp_xfrm_attrs *attrs)
 {
-       return mlx5_fpga_esp_modify_xfrm(xfrm, attrs);
+       const struct mlx5_accel_ipsec_ops *ipsec_ops = xfrm->mdev->ipsec_ops;
+
+       if (!ipsec_ops || !ipsec_ops->esp_modify_xfrm)
+               return -EOPNOTSUPP;
+
+       return ipsec_ops->esp_modify_xfrm(xfrm, attrs);
 }
 EXPORT_SYMBOL_GPL(mlx5_accel_esp_modify_xfrm);
-
-#endif
index e897476..fbb9c54 100644 (file)
@@ -37,7 +37,7 @@
 #include <linux/mlx5/driver.h>
 #include <linux/mlx5/accel.h>
 
-#ifdef CONFIG_MLX5_FPGA_IPSEC
+#ifdef CONFIG_MLX5_ACCEL
 
 #define MLX5_IPSEC_DEV(mdev) (mlx5_accel_ipsec_device_caps(mdev) & \
                              MLX5_ACCEL_IPSEC_CAP_DEVICE)
@@ -49,12 +49,30 @@ int mlx5_accel_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
 void *mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
                                       struct mlx5_accel_esp_xfrm *xfrm,
                                       u32 *sa_handle);
-void mlx5_accel_esp_free_hw_context(void *context);
+void mlx5_accel_esp_free_hw_context(struct mlx5_core_dev *mdev, void *context);
 
-int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
-void mlx5_accel_ipsec_build_fs_cmds(void);
+void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev);
 void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev);
 
+struct mlx5_accel_ipsec_ops {
+       u32 (*device_caps)(struct mlx5_core_dev *mdev);
+       unsigned int (*counters_count)(struct mlx5_core_dev *mdev);
+       int (*counters_read)(struct mlx5_core_dev *mdev, u64 *counters, unsigned int count);
+       void* (*create_hw_context)(struct mlx5_core_dev *mdev,
+                                  struct mlx5_accel_esp_xfrm *xfrm,
+                                  const __be32 saddr[4], const __be32 daddr[4],
+                                  const __be32 spi, bool is_ipv6, u32 *sa_handle);
+       void (*free_hw_context)(void *context);
+       int (*init)(struct mlx5_core_dev *mdev);
+       void (*cleanup)(struct mlx5_core_dev *mdev);
+       struct mlx5_accel_esp_xfrm* (*esp_create_xfrm)(struct mlx5_core_dev *mdev,
+                                                      const struct mlx5_accel_esp_xfrm_attrs *attrs,
+                                                      u32 flags);
+       int (*esp_modify_xfrm)(struct mlx5_accel_esp_xfrm *xfrm,
+                              const struct mlx5_accel_esp_xfrm_attrs *attrs);
+       void (*esp_destroy_xfrm)(struct mlx5_accel_esp_xfrm *xfrm);
+};
+
 #else
 
 #define MLX5_IPSEC_DEV(mdev) false
@@ -67,23 +85,12 @@ mlx5_accel_esp_create_hw_context(struct mlx5_core_dev *mdev,
        return NULL;
 }
 
-static inline void mlx5_accel_esp_free_hw_context(void *context)
-{
-}
-
-static inline int mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev)
-{
-       return 0;
-}
+static inline void mlx5_accel_esp_free_hw_context(struct mlx5_core_dev *mdev, void *context) {}
 
-static inline void mlx5_accel_ipsec_build_fs_cmds(void)
-{
-}
+static inline void mlx5_accel_ipsec_init(struct mlx5_core_dev *mdev) {}
 
-static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev)
-{
-}
+static inline void mlx5_accel_ipsec_cleanup(struct mlx5_core_dev *mdev) {}
 
-#endif
+#endif /* CONFIG_MLX5_ACCEL */
 
 #endif /* __MLX5_ACCEL_IPSEC_H__ */
index bc55c82..8d797cd 100644 (file)
@@ -342,7 +342,7 @@ static int mlx5e_xfrm_add_state(struct xfrm_state *x)
        goto out;
 
 err_hw_ctx:
-       mlx5_accel_esp_free_hw_context(sa_entry->hw_context);
+       mlx5_accel_esp_free_hw_context(priv->mdev, sa_entry->hw_context);
 err_xfrm:
        mlx5_accel_esp_destroy_xfrm(sa_entry->xfrm);
 err_sa_entry:
@@ -372,7 +372,7 @@ static void mlx5e_xfrm_free_state(struct xfrm_state *x)
 
        if (sa_entry->hw_context) {
                flush_workqueue(sa_entry->ipsec->wq);
-               mlx5_accel_esp_free_hw_context(sa_entry->hw_context);
+               mlx5_accel_esp_free_hw_context(sa_entry->xfrm->mdev, sa_entry->hw_context);
                mlx5_accel_esp_destroy_xfrm(sa_entry->xfrm);
        }
 
index b463787..cc67366 100644 (file)
@@ -359,7 +359,7 @@ u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
        return ret;
 }
 
-unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
+static unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
 {
        struct mlx5_fpga_device *fdev = mdev->fpga;
 
@@ -370,8 +370,8 @@ unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev)
                        number_of_ipsec_counters);
 }
 
-int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
-                                 unsigned int counters_count)
+static int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
+                                        unsigned int counters_count)
 {
        struct mlx5_fpga_device *fdev = mdev->fpga;
        unsigned int i;
@@ -665,12 +665,10 @@ static bool mlx5_is_fpga_egress_ipsec_rule(struct mlx5_core_dev *dev,
        return true;
 }
 
-void *mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
-                                   struct mlx5_accel_esp_xfrm *accel_xfrm,
-                                   const __be32 saddr[4],
-                                   const __be32 daddr[4],
-                                   const __be32 spi, bool is_ipv6,
-                                   u32 *sa_handle)
+static void *mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
+                                          struct mlx5_accel_esp_xfrm *accel_xfrm,
+                                          const __be32 saddr[4], const __be32 daddr[4],
+                                          const __be32 spi, bool is_ipv6, u32 *sa_handle)
 {
        struct mlx5_fpga_ipsec_sa_ctx *sa_ctx;
        struct mlx5_fpga_esp_xfrm *fpga_xfrm =
@@ -862,7 +860,7 @@ mlx5_fpga_ipsec_release_sa_ctx(struct mlx5_fpga_ipsec_sa_ctx *sa_ctx)
        mutex_unlock(&fipsec->sa_hash_lock);
 }
 
-void mlx5_fpga_ipsec_delete_sa_ctx(void *context)
+static void mlx5_fpga_ipsec_delete_sa_ctx(void *context)
 {
        struct mlx5_fpga_esp_xfrm *fpga_xfrm =
                        ((struct mlx5_fpga_ipsec_sa_ctx *)context)->fpga_xfrm;
@@ -1264,7 +1262,7 @@ const struct mlx5_flow_cmds *mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flo
        }
 }
 
-int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev)
+static int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev)
 {
        struct mlx5_fpga_conn_attr init_attr = {0};
        struct mlx5_fpga_device *fdev = mdev->fpga;
@@ -1346,7 +1344,7 @@ static void destroy_rules_rb(struct rb_root *root)
        }
 }
 
-void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev)
+static void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev)
 {
        struct mlx5_fpga_device *fdev = mdev->fpga;
 
@@ -1451,7 +1449,7 @@ mlx5_fpga_esp_validate_xfrm_attrs(struct mlx5_core_dev *mdev,
        return 0;
 }
 
-struct mlx5_accel_esp_xfrm *
+static struct mlx5_accel_esp_xfrm *
 mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
                          const struct mlx5_accel_esp_xfrm_attrs *attrs,
                          u32 flags)
@@ -1479,7 +1477,7 @@ mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
        return &fpga_xfrm->accel_xfrm;
 }
 
-void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
+static void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
 {
        struct mlx5_fpga_esp_xfrm *fpga_xfrm =
                        container_of(xfrm, struct mlx5_fpga_esp_xfrm,
@@ -1488,8 +1486,8 @@ void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm)
        kfree(fpga_xfrm);
 }
 
-int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
-                             const struct mlx5_accel_esp_xfrm_attrs *attrs)
+static int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
+                                    const struct mlx5_accel_esp_xfrm_attrs *attrs)
 {
        struct mlx5_core_dev *mdev = xfrm->mdev;
        struct mlx5_fpga_device *fdev = mdev->fpga;
@@ -1560,3 +1558,24 @@ change_sw_xfrm_attrs:
        mutex_unlock(&fpga_xfrm->lock);
        return err;
 }
+
+static const struct mlx5_accel_ipsec_ops fpga_ipsec_ops = {
+       .device_caps = mlx5_fpga_ipsec_device_caps,
+       .counters_count = mlx5_fpga_ipsec_counters_count,
+       .counters_read = mlx5_fpga_ipsec_counters_read,
+       .create_hw_context = mlx5_fpga_ipsec_create_sa_ctx,
+       .free_hw_context = mlx5_fpga_ipsec_delete_sa_ctx,
+       .init = mlx5_fpga_ipsec_init,
+       .cleanup = mlx5_fpga_ipsec_cleanup,
+       .esp_create_xfrm = mlx5_fpga_esp_create_xfrm,
+       .esp_modify_xfrm = mlx5_fpga_esp_modify_xfrm,
+       .esp_destroy_xfrm = mlx5_fpga_esp_destroy_xfrm,
+};
+
+const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev)
+{
+       if (!mlx5_fpga_is_ipsec_device(mdev))
+               return NULL;
+
+       return &fpga_ipsec_ops;
+}
index 9ba637f..db88eb4 100644 (file)
 #include "fs_cmd.h"
 
 #ifdef CONFIG_MLX5_FPGA_IPSEC
+const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev);
 u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev);
-unsigned int mlx5_fpga_ipsec_counters_count(struct mlx5_core_dev *mdev);
-int mlx5_fpga_ipsec_counters_read(struct mlx5_core_dev *mdev, u64 *counters,
-                                 unsigned int counters_count);
-
-void *mlx5_fpga_ipsec_create_sa_ctx(struct mlx5_core_dev *mdev,
-                                   struct mlx5_accel_esp_xfrm *accel_xfrm,
-                                   const __be32 saddr[4],
-                                   const __be32 daddr[4],
-                                   const __be32 spi, bool is_ipv6,
-                                   u32 *sa_handle);
-void mlx5_fpga_ipsec_delete_sa_ctx(void *context);
-
-int mlx5_fpga_ipsec_init(struct mlx5_core_dev *mdev);
-void mlx5_fpga_ipsec_cleanup(struct mlx5_core_dev *mdev);
-void mlx5_fpga_ipsec_build_fs_cmds(void);
-
-struct mlx5_accel_esp_xfrm *
-mlx5_fpga_esp_create_xfrm(struct mlx5_core_dev *mdev,
-                         const struct mlx5_accel_esp_xfrm_attrs *attrs,
-                         u32 flags);
-void mlx5_fpga_esp_destroy_xfrm(struct mlx5_accel_esp_xfrm *xfrm);
-int mlx5_fpga_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
-                             const struct mlx5_accel_esp_xfrm_attrs *attrs);
-
 const struct mlx5_flow_cmds *
 mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type);
+void mlx5_fpga_ipsec_build_fs_cmds(void);
 #else
-static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev)
-{
-       return 0;
-}
-
+static inline
+const struct mlx5_accel_ipsec_ops *mlx5_fpga_ipsec_ops(struct mlx5_core_dev *mdev)
+{ return NULL; }
+static inline u32 mlx5_fpga_ipsec_device_caps(struct mlx5_core_dev *mdev) { return 0; }
 static inline const struct mlx5_flow_cmds *
 mlx5_fs_cmd_get_default_ipsec_fpga_cmds(enum fs_flow_table_type type)
 {
        return mlx5_fs_cmd_get_default(type);
 }
 
+static inline void mlx5_fpga_ipsec_build_fs_cmds(void) {};
+
 #endif /* CONFIG_MLX5_FPGA_IPSEC */
 #endif /* __MLX5_FPGA_IPSEC_H__ */
index 8b65890..e32d46c 100644 (file)
@@ -1089,11 +1089,7 @@ static int mlx5_load(struct mlx5_core_dev *dev)
                goto err_fpga_start;
        }
 
-       err = mlx5_accel_ipsec_init(dev);
-       if (err) {
-               mlx5_core_err(dev, "IPSec device start failed %d\n", err);
-               goto err_ipsec_start;
-       }
+       mlx5_accel_ipsec_init(dev);
 
        err = mlx5_accel_tls_init(dev);
        if (err) {
@@ -1135,7 +1131,6 @@ err_fs:
        mlx5_accel_tls_cleanup(dev);
 err_tls_start:
        mlx5_accel_ipsec_cleanup(dev);
-err_ipsec_start:
        mlx5_fpga_device_stop(dev);
 err_fpga_start:
        mlx5_rsc_dump_cleanup(dev);
@@ -1628,7 +1623,7 @@ static int __init init(void)
        get_random_bytes(&sw_owner_id, sizeof(sw_owner_id));
 
        mlx5_core_verify_params();
-       mlx5_accel_ipsec_build_fs_cmds();
+       mlx5_fpga_ipsec_build_fs_cmds();
        mlx5_register_debugfs();
 
        err = pci_register_driver(&mlx5_core_driver);
index 96ebaa9..dacf695 100644 (file)
@@ -126,7 +126,7 @@ enum mlx5_accel_ipsec_cap {
        MLX5_ACCEL_IPSEC_CAP_TX_IV_IS_ESN       = 1 << 7,
 };
 
-#ifdef CONFIG_MLX5_FPGA_IPSEC
+#ifdef CONFIG_MLX5_ACCEL
 
 u32 mlx5_accel_ipsec_device_caps(struct mlx5_core_dev *mdev);
 
@@ -152,5 +152,5 @@ static inline int
 mlx5_accel_esp_modify_xfrm(struct mlx5_accel_esp_xfrm *xfrm,
                           const struct mlx5_accel_esp_xfrm_attrs *attrs) { return -EOPNOTSUPP; }
 
-#endif
-#endif
+#endif /* CONFIG_MLX5_ACCEL */
+#endif /* __MLX5_ACCEL_H__ */
index 1e6ca71..6a97ad6 100644 (file)
@@ -707,6 +707,9 @@ struct mlx5_core_dev {
        } roce;
 #ifdef CONFIG_MLX5_FPGA
        struct mlx5_fpga_device *fpga;
+#endif
+#ifdef CONFIG_MLX5_ACCEL
+       const struct mlx5_accel_ipsec_ops *ipsec_ops;
 #endif
        struct mlx5_clock        clock;
        struct mlx5_ib_clock_info  *clock_info;