drm/amd/display: Reset cached PSR parameters after hibernate
authorEvgenii Krasnikov <Evgenii.Krasnikov@amd.com>
Thu, 21 Apr 2022 21:18:19 +0000 (17:18 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 10 May 2022 21:53:12 +0000 (17:53 -0400)
[WHY]
After hibernate system might be using old invalid psr_power_opt and
psr_allow_active that never get reset

[HOW]
Reset cached Panel Self Refresh parameters when PSR is first configured
for eDP in dc_link_setup_psr.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Evgenii Krasnikov <Evgenii.Krasnikov@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/core/dc_link.c

index 3d13ee3..48e274f 100644 (file)
@@ -3317,9 +3317,12 @@ bool dc_link_setup_psr(struct dc_link *link,
         */
        psr_context->frame_delay = 0;
 
-       if (psr)
+       if (psr) {
                link->psr_settings.psr_feature_enabled = psr->funcs->psr_copy_settings(psr,
                        link, psr_context, panel_inst);
+               link->psr_settings.psr_power_opt = 0;
+               link->psr_settings.psr_allow_active = 0;
+       }
        else
                link->psr_settings.psr_feature_enabled = dmcu->funcs->setup_psr(dmcu, link, psr_context);