/**
* @mmio: mmio info for GT. All GTs within a tile share the same
* register space, but have their own copy of GSI registers at a
- * specific offset, as well as their own forcewake handling.
+ * specific offset.
*/
struct {
- /** @mmio.fw: force wake for GT */
- struct xe_force_wake fw;
/**
* @mmio.adj_limit: adjust MMIO address if address is below this
* value
u32 adj_offset;
} mmio;
+ /**
+ * @pm: power management info for GT. The driver uses the GT's
+ * "force wake" interface to wake up specific parts of the GT hardware
+ * from C6 sleep states and ensure the hardware remains awake while it
+ * is being actively used.
+ */
+ struct {
+ /** @pm.fw: force wake for GT */
+ struct xe_force_wake fw;
+ } pm;
+
/** @sriov: virtualization data related to GT */
union {
/** @sriov.pf: PF data. Valid only if driver is running as PF */
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
+#include "xe_device.h"
#include "xe_device_types.h"
#include "xe_force_wake.h"
#include "xe_gt.h"
xe_gt_dbg(gt, "Applying %s save-restore MMIOs\n", sr->name);
- err = xe_force_wake_get(>->mmio.fw, XE_FORCEWAKE_ALL);
+ err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (err)
goto err_force_wake;
xa_for_each(&sr->xa, reg, entry)
apply_one_mmio(gt, entry);
- err = xe_force_wake_put(>->mmio.fw, XE_FORCEWAKE_ALL);
+ err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
XE_WARN_ON(err);
return;
drm_dbg(&xe->drm, "Whitelisting %s registers\n", sr->name);
- err = xe_force_wake_get(>->mmio.fw, XE_FORCEWAKE_ALL);
+ err = xe_force_wake_get(gt_to_fw(gt), XE_FORCEWAKE_ALL);
if (err)
goto err_force_wake;
xe_mmio_write32(gt, RING_FORCE_TO_NONPRIV(mmio_base, slot), addr);
}
- err = xe_force_wake_put(>->mmio.fw, XE_FORCEWAKE_ALL);
+ err = xe_force_wake_put(gt_to_fw(gt), XE_FORCEWAKE_ALL);
XE_WARN_ON(err);
return;