Merge tag 'omap-for-v5.7/cpsw-fixes-signed' of git://git.kernel.org/pub/scm/linux...
authorArnd Bergmann <arnd@arndb.de>
Mon, 25 May 2020 22:18:47 +0000 (00:18 +0200)
committerArnd Bergmann <arnd@arndb.de>
Mon, 25 May 2020 22:18:48 +0000 (00:18 +0200)
Few cpsw related dts fixes for omaps

Recent cpsw driver changes exposed few regressions in the cpsw related
dts configuration that would be good to fix:

- Few more boards still need to be updated to use rgmii-rxid phy caused
  by the fallout from commit bcf3440c6dd7 ("net: phy: micrel: add phy-mode
  support for the KSZ9031 PHY" as the rx delay is now disabled unless we
  use rgmii-rxid.

- On dm814x we have been using a wrong clock for mdio that now can produce
  external abort on some boards

* tag 'omap-for-v5.7/cpsw-fixes-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: Fix wrong mdio clock for dm814x
  ARM: dts: am437x: fix networking on boards with ksz9031 phy
  ARM: dts: am57xx: fix networking on boards with ksz9031 phy

Link: https://lore.kernel.org/r/pull-1589472123-367692@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/am437x-gp-evm.dts
arch/arm/boot/dts/am437x-idk-evm.dts
arch/arm/boot/dts/am437x-sk-evm.dts
arch/arm/boot/dts/am571x-idk.dts
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
arch/arm/boot/dts/am57xx-idk-common.dtsi
arch/arm/boot/dts/dm814x.dtsi

index 811c8ca..d692e3b 100644 (file)
 
 &cpsw_emac0 {
        phy-handle = <&ethphy0>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
 };
 
 &elm {
index 9f66f96..a958f9e 100644 (file)
 
 &cpsw_emac0 {
        phy-handle = <&ethphy0>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
 };
 
 &rtc {
index 2522249..4d5a7ca 100644 (file)
 
 &cpsw_emac0 {
        phy-handle = <&ethphy0>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
        phy-handle = <&ethphy1>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <2>;
 };
 
index 669559c..c13756f 100644 (file)
 
 &cpsw_port1 {
        phy-handle = <&ethphy0_sw>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        ti,dual-emac-pvid = <1>;
 };
 
 &cpsw_port2 {
        phy-handle = <&ethphy1_sw>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        ti,dual-emac-pvid = <2>;
 };
 
index a813a0c..5656753 100644 (file)
 
 &cpsw_emac0 {
        phy-handle = <&phy0>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
        phy-handle = <&phy1>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <2>;
 };
 
index aa5e55f..a3ff123 100644 (file)
 
 &cpsw_emac0 {
        phy-handle = <&ethphy0>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <1>;
 };
 
 &cpsw_emac1 {
        phy-handle = <&ethphy1>;
-       phy-mode = "rgmii";
+       phy-mode = "rgmii-rxid";
        dual_emac_res_vlan = <2>;
 };
 
index 44ed5a7..c28ca05 100644 (file)
 
                                        davinci_mdio: mdio@800 {
                                                compatible = "ti,cpsw-mdio", "ti,davinci_mdio";
-                                               clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>;
+                                               clocks = <&cpsw_125mhz_gclk>;
                                                clock-names = "fck";
                                                #address-cells = <1>;
                                                #size-cells = <0>;