arm64: dts: renesas: rzg3s-smarc: Enable SDHI1
authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Mon, 16 Oct 2023 10:53:44 +0000 (13:53 +0300)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 20 Nov 2023 08:19:06 +0000 (09:19 +0100)
Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD
interface. Although Vccq doesn't cross the boundary of SoM it has
been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to
SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc
Carrier-II board.

Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231016105344.294096-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi

index e7073a0..2145201 100644 (file)
 / {
        aliases {
                serial0 = &scif0;
+               mmc1 = &sdhi1;
+       };
+
+       vcc_sdhi1: regulator-vcc-sdhi1 {
+               compatible = "regulator-fixed";
+               regulator-name = "SDHI1 Vcc";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               gpios = <&pinctrl RZG2L_GPIO(2, 3) GPIO_ACTIVE_HIGH>;
+               enable-active-high;
+       };
+
+       vccq_sdhi1: regulator-vccq-sdhi1 {
+               compatible = "regulator-gpio";
+               regulator-name = "SDHI1 VccQ";
+               regulator-min-microvolt = <1800000>;
+               regulator-max-microvolt = <3300000>;
+               gpios = <&pinctrl RZG2L_GPIO(4, 2) GPIO_ACTIVE_HIGH>;
+               gpios-states = <1>;
+               states = <3300000 1>, <1800000 0>;
        };
 };
 
                pinmux = <RZG2L_PORT_PINMUX(6, 3, 1)>, /* RXD */
                         <RZG2L_PORT_PINMUX(6, 4, 1)>; /* TXD */
        };
+
+       sdhi1_pins: sd1 {
+               data {
+                       pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+                       power-source = <3300>;
+               };
+
+               ctrl {
+                       pins = "SD1_CLK", "SD1_CMD";
+                       power-source = <3300>;
+               };
+
+               cd {
+                       pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
+               };
+       };
+
+       sdhi1_pins_uhs: sd1-uhs {
+               data {
+                       pins = "SD1_DATA0", "SD1_DATA1", "SD1_DATA2", "SD1_DATA3";
+                       power-source = <1800>;
+               };
+
+               ctrl {
+                       pins = "SD1_CLK", "SD1_CMD";
+                       power-source = <1800>;
+               };
+
+               cd {
+                       pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
+               };
+       };
 };
 
 &scif0 {
        pinctrl-0 = <&scif0_pins>;
        status = "okay";
 };
+
+&sdhi1 {
+       pinctrl-0 = <&sdhi1_pins>;
+       pinctrl-1 = <&sdhi1_pins_uhs>;
+       pinctrl-names = "default", "state_uhs";
+       vmmc-supply = <&vcc_sdhi1>;
+       vqmmc-supply = <&vccq_sdhi1>;
+       bus-width = <4>;
+       sd-uhs-sdr50;
+       sd-uhs-sdr104;
+       max-frequency = <125000000>;
+       status = "okay";
+};