Align with FW changes.
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
sizeof(uint32_t) * 5);
set_hw_resources.osssys_version = adev->ip_versions[OSSSYS_HWIP][0];
+ set_hw_resources.vcn_version = adev->ip_versions[VCN_HWIP][0];
+ set_hw_resources.vpe_version = adev->ip_versions[VPE_HWIP][0];
+
set_hw_resources.api_status.api_completion_fence_addr = umsch->ring.fence_drv.gpu_addr;
set_hw_resources.api_status.api_completion_fence_value = ++umsch->ring.fence_drv.sync_seq;
union UMSCH_API_HEADER header;
uint32_t vmid_mask_mm_vcn;
uint32_t vmid_mask_mm_vpe;
+ uint32_t collaboration_mask_vpe;
uint32_t engine_mask;
uint32_t logging_vmid;
uint32_t vcn0_hqd_mask[MAX_VCN0_INSTANCES];
uint32_t mmhub_version;
uint32_t osssys_base[UMSCH_MAX_HWIP_SEGMENT];
uint32_t osssys_version;
+ uint32_t vcn_version;
+ uint32_t vpe_version;
struct UMSCH_API_STATUS api_status;
union {
struct {