drm/vc4: hvs: SCALER_DISPBKGND_AUTOHS is only valid on HVS4

The bit used for SCALER_DISPBKGND_AUTOHS in SCALER_DISPBKGNDX
has been repurposed on HVS5 to configure whether a display can
win back-to-back arbitration wins for the COB.

This is not desirable, therefore only select this bit on HVS4,
and explicitly clear it on HVS5.

Fixes: c54619b0bfb3 ("drm/vc4: Add support for the BCM2711 HVS5")
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
Link: https://lore.kernel.org/r/20221207-rpi-hvs-crtc-misc-v1-3-1f8e0770798b@cerno.tech
Signed-off-by: Maxime Ripard <maxime@cerno.tech>

diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 5cdecb5..0fc6d74 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -370,28 +370,30 @@ static int vc4_hvs_init_channel(struct vc4_hvs *hvs, struct drm_crtc *crtc,
         * mode.
         */
        dispctrl = SCALER_DISPCTRLX_ENABLE;
+       dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
 
-       if (!vc4->is_vc5)
+       if (!vc4->is_vc5) {
                dispctrl |= VC4_SET_FIELD(mode->hdisplay,
                                          SCALER_DISPCTRLX_WIDTH) |
                            VC4_SET_FIELD(mode->vdisplay,
                                          SCALER_DISPCTRLX_HEIGHT) |
                            (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
-       else
+               dispbkgndx |= SCALER_DISPBKGND_AUTOHS;
+       } else {
                dispctrl |= VC4_SET_FIELD(mode->hdisplay,
                                          SCALER5_DISPCTRLX_WIDTH) |
                            VC4_SET_FIELD(mode->vdisplay,
                                          SCALER5_DISPCTRLX_HEIGHT) |
                            (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
+               dispbkgndx &= ~SCALER5_DISPBKGND_BCK2BCK;
+       }
 
        HVS_WRITE(SCALER_DISPCTRLX(chan), dispctrl);
 
-       dispbkgndx = HVS_READ(SCALER_DISPBKGNDX(chan));
        dispbkgndx &= ~SCALER_DISPBKGND_GAMMA;
        dispbkgndx &= ~SCALER_DISPBKGND_INTERLACE;
 
        HVS_WRITE(SCALER_DISPBKGNDX(chan), dispbkgndx |
-                 SCALER_DISPBKGND_AUTOHS |
                  ((!vc4->is_vc5) ? SCALER_DISPBKGND_GAMMA : 0) |
                  (interlace ? SCALER_DISPBKGND_INTERLACE : 0));
 

diff --git a/drivers/gpu/drm/vc4/vc4_regs.h b/drivers/gpu/drm/vc4/vc4_regs.h
index f121905..95deacd 100644 (file)
--- a/drivers/gpu/drm/vc4/vc4_regs.h
+++ b/drivers/gpu/drm/vc4/vc4_regs.h
@@ -366,6 +366,7 @@
 
 #define SCALER_DISPBKGND0                       0x00000044
 # define SCALER_DISPBKGND_AUTOHS               BIT(31)
+# define SCALER5_DISPBKGND_BCK2BCK             BIT(31)
 # define SCALER_DISPBKGND_INTERLACE            BIT(30)
 # define SCALER_DISPBKGND_GAMMA                        BIT(29)
 # define SCALER_DISPBKGND_TESTMODE_MASK                VC4_MASK(28, 25)