KVM: nVMX: Don't flush TLB on nested VMX transition

Unconditionally skip the TLB flush triggered when reusing a root for a
nested transition as nested_vmx_transition_tlb_flush() ensures the TLB
is flushed when needed, regardless of whether the MMU can reuse a cached
root (or the last root).

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Message-Id: <20200320212833.3507-35-sean.j.christopherson@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

diff --git a/arch/x86/kvm/mmu/mmu.c b/arch/x86/kvm/mmu/mmu.c
index 34c0154..10fb9e7 100644 (file)
--- a/arch/x86/kvm/mmu/mmu.c
+++ b/arch/x86/kvm/mmu/mmu.c
@@ -5034,7 +5034,7 @@ void kvm_init_shadow_ept_mmu(struct kvm_vcpu *vcpu, bool execonly,
                kvm_calc_shadow_ept_root_page_role(vcpu, accessed_dirty,
                                                   execonly, level);
 
-       __kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, false, true);
+       __kvm_mmu_new_cr3(vcpu, new_eptp, new_role.base, true, true);
 
        if (new_role.as_u64 == context->mmu_role.as_u64)
                return;

diff --git a/arch/x86/kvm/vmx/nested.c b/arch/x86/kvm/vmx/nested.c
index a829095..237e2e3 100644 (file)
--- a/arch/x86/kvm/vmx/nested.c
+++ b/arch/x86/kvm/vmx/nested.c
@@ -1143,10 +1143,12 @@ static int nested_vmx_load_cr3(struct kvm_vcpu *vcpu, unsigned long cr3, bool ne
        }
 
        /*
-        * See nested_vmx_transition_mmu_sync for details on skipping the MMU sync.
+        * Unconditionally skip the TLB flush on fast CR3 switch, all TLB
+        * flushes are handled by nested_vmx_transition_tlb_flush().  See
+        * nested_vmx_transition_mmu_sync for details on skipping the MMU sync.
         */
        if (!nested_ept)
-               kvm_mmu_new_cr3(vcpu, cr3, false,
+               kvm_mmu_new_cr3(vcpu, cr3, true,
                                !nested_vmx_transition_mmu_sync(vcpu));
 
        vcpu->arch.cr3 = cr3;