drm/i915: Add VRR_CTL_LINE_COUNT field to VRR_CTL register def
authorManasi Navare <manasi.d.navare@intel.com>
Wed, 2 Dec 2020 18:27:27 +0000 (10:27 -0800)
committerManasi Navare <manasi.d.navare@intel.com>
Thu, 3 Dec 2020 22:49:47 +0000 (14:49 -0800)
VRR_CTL register only had a GENMASK but no field prep
define for TRANS_VRR_CTL_LINE_COUNT field so add that

Cc: Aditya Swarup <aditya.swarup@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20201202182727.26158-1-manasi.d.navare@intel.com
drivers/gpu/drm/i915/i915_reg.h

index a8c4d16..593b6c9 100644 (file)
@@ -4352,6 +4352,7 @@ enum {
 #define   VRR_CTL_IGN_MAX_SHIFT                REG_BIT(30)
 #define   VRR_CTL_FLIP_LINE_EN         REG_BIT(29)
 #define   VRR_CTL_LINE_COUNT_MASK      REG_GENMASK(10, 3)
+#define   VRR_CTL_LINE_COUNT(x)                REG_FIELD_PREP(VRR_CTL_LINE_COUNT_MASK, (x))
 #define   VRR_CTL_SW_FULLLINE_COUNT    REG_BIT(0)
 
 #define _TRANS_VRR_VMAX_A              0x60424