net: stmmac: Add HW descriptor prefetch setting for DWMAC Core 5.20 onwards
authorMohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Thu, 22 Apr 2021 07:55:00 +0000 (15:55 +0800)
committerDavid S. Miller <davem@davemloft.net>
Thu, 22 Apr 2021 22:02:40 +0000 (15:02 -0700)
DWMAC Core 5.20 onwards supports HW descriptor prefetching.
Additionally, it also depends on platform specific RTL configuration.
This capability could be enabled by setting DMA_Mode bit-19 (DCHE).

So, to enable this cability, platform must set plat->dma_cfg->dche = true
and the DWMAC core version must be 5.20 onwards. Else, this capability
wouldn`t be configured

Signed-off-by: Mohammad Athari Bin Ismail <mohammad.athari.ismail@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/stmicro/stmmac/common.h
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.h
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
include/linux/stmmac.h

index c54a56b..619e3c0 100644 (file)
@@ -33,6 +33,7 @@
 #define DWMAC_CORE_4_10                0x41
 #define DWMAC_CORE_5_00                0x50
 #define DWMAC_CORE_5_10                0x51
+#define DWMAC_CORE_5_20                0x52
 #define DWXGMAC_CORE_2_10      0x21
 #define DWXLGMAC_CORE_2_00     0x20
 
index cb17f6c..a602d16 100644 (file)
@@ -162,12 +162,18 @@ static void dwmac4_dma_init(void __iomem *ioaddr,
 
        writel(value, ioaddr + DMA_SYS_BUS_MODE);
 
+       value = readl(ioaddr + DMA_BUS_MODE);
+
        if (dma_cfg->multi_msi_en) {
-               value = readl(ioaddr + DMA_BUS_MODE);
                value &= ~DMA_BUS_MODE_INTM_MASK;
                value |= (DMA_BUS_MODE_INTM_MODE1 << DMA_BUS_MODE_INTM_SHIFT);
-               writel(value, ioaddr + DMA_BUS_MODE);
        }
+
+       if (dma_cfg->dche)
+               value |= DMA_BUS_MODE_DCHE;
+
+       writel(value, ioaddr + DMA_BUS_MODE);
+
 }
 
 static void _dwmac4_dump_dma_regs(void __iomem *ioaddr, u32 channel,
index 05481eb..9321879 100644 (file)
@@ -25,6 +25,7 @@
 #define DMA_TBS_CTRL                   0x00001050
 
 /* DMA Bus Mode bitmap */
+#define DMA_BUS_MODE_DCHE              BIT(19)
 #define DMA_BUS_MODE_INTM_MASK         GENMASK(17, 16)
 #define DMA_BUS_MODE_INTM_SHIFT                16
 #define DMA_BUS_MODE_INTM_MODE1                0x1
index d1ca07c..372090e 100644 (file)
@@ -6849,6 +6849,11 @@ int stmmac_dvr_probe(struct device *device,
        if (ret)
                goto error_hw_init;
 
+       /* Only DWMAC core version 5.20 onwards supports HW descriptor prefetch.
+        */
+       if (priv->synopsys_id < DWMAC_CORE_5_20)
+               priv->plat->dma_cfg->dche = false;
+
        stmmac_check_ether_addr(priv);
 
        ndev->netdev_ops = &stmmac_netdev_ops;
index 97edb31..0db3636 100644 (file)
@@ -97,6 +97,7 @@ struct stmmac_dma_cfg {
        bool aal;
        bool eame;
        bool multi_msi_en;
+       bool dche;
 };
 
 #define AXI_BLEN       7