dt-bindings: phy: Add binding doc for Stingray PCIe PHY
authorRay Jui <ray.jui@broadcom.com>
Sat, 7 Jul 2018 00:18:32 +0000 (17:18 -0700)
committerKishon Vijay Abraham I <kishon@ti.com>
Tue, 10 Jul 2018 08:15:09 +0000 (13:45 +0530)
Add binding document for Stingray PCIe PHYs for both PAXB and PAXC based
root complex

Signed-off-by: Ray Jui <ray.jui@broadcom.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt b/Documentation/devicetree/bindings/phy/brcm,sr-pcie-phy.txt
new file mode 100644 (file)
index 0000000..e8d8228
--- /dev/null
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+Broadcom Stingray PCIe PHY
+
+Required properties:
+- compatible: must be "brcm,sr-pcie-phy"
+- reg: base address and length of the PCIe SS register space
+- brcm,sr-cdru: phandle to the CDRU syscon node
+- brcm,sr-mhb: phandle to the MHB syscon node
+- #phy-cells: Must be 1, denotes the PHY index
+
+For PAXB based root complex, one can have a configuration of up to 8 PHYs
+PHY index goes from 0 to 7
+
+For the internal PAXC based root complex, PHY index is always 8
+
+Example:
+       mhb: syscon@60401000 {
+               compatible = "brcm,sr-mhb", "syscon";
+               reg = <0 0x60401000 0 0x38c>;
+       };
+
+       cdru: syscon@6641d000 {
+               compatible = "brcm,sr-cdru", "syscon";
+               reg = <0 0x6641d000 0 0x400>;
+       };
+
+       pcie_phy: phy@40000000 {
+               compatible = "brcm,sr-pcie-phy";
+               reg = <0 0x40000000 0 0x800>;
+               brcm,sr-cdru = <&cdru>;
+               brcm,sr-mhb = <&mhb>;
+               #phy-cells = <1>;
+       };
+
+       /* users of the PCIe PHY */
+
+       pcie0: pcie@48000000 {
+               ...
+               ...
+               phys = <&pcie_phy 0>;
+               phy-names = "pcie-phy";
+       };