KVM: VMX: Add helper to check reserved bits in IA32_PERF_GLOBAL_CTRL
authorOliver Upton <oupton@google.com>
Thu, 14 Nov 2019 00:17:15 +0000 (16:17 -0800)
committerPaolo Bonzini <pbonzini@redhat.com>
Fri, 15 Nov 2019 10:44:13 +0000 (11:44 +0100)
Create a helper function to check the validity of a proposed value for
IA32_PERF_GLOBAL_CTRL from the existing check in intel_pmu_set_msr().

Per Intel's SDM, the reserved bits in IA32_PERF_GLOBAL_CTRL must be
cleared for the corresponding host/guest state fields.

Suggested-by: Jim Mattson <jmattson@google.com>
Co-developed-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Krish Sadhukhan <krish.sadhukhan@oracle.com>
Signed-off-by: Oliver Upton <oupton@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Reviewed-by: Peter Shier <pshier@google.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arch/x86/kvm/pmu.h
arch/x86/kvm/vmx/pmu_intel.c

index b7a6258..7ebb623 100644 (file)
@@ -89,6 +89,12 @@ static inline bool pmc_is_enabled(struct kvm_pmc *pmc)
        return kvm_x86_ops->pmu_ops->pmc_is_enabled(pmc);
 }
 
+static inline bool kvm_valid_perf_global_ctrl(struct kvm_pmu *pmu,
+                                                u64 data)
+{
+       return !(pmu->global_ctrl_mask & data);
+}
+
 /* returns general purpose PMC with the specified MSR. Note that it can be
  * used for both PERFCTRn and EVNTSELn; that is why it accepts base as a
  * paramenter to tell them apart.
index b5a1637..0990a12 100644 (file)
@@ -236,7 +236,7 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
        case MSR_CORE_PERF_GLOBAL_CTRL:
                if (pmu->global_ctrl == data)
                        return 0;
-               if (!(data & pmu->global_ctrl_mask)) {
+               if (kvm_valid_perf_global_ctrl(pmu, data)) {
                        global_ctrl_changed(pmu, data);
                        return 0;
                }