ARM: omap2: Fix checkpatch issues
authorFranziska Naepelt <franziska.naepelt@googlemail.com>
Wed, 31 May 2023 17:04:27 +0000 (19:04 +0200)
committerTony Lindgren <tony@atomide.com>
Fri, 2 Jun 2023 09:33:48 +0000 (12:33 +0300)
The following checkpatch issues have been resolved:

arch/arm/mach-omap2/omap-wakeupgen.c
WARNING: Missing a blank line after declarations

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
ERROR: space prohibited before that ',' (ctx:WxE)
WARNING: Use lore.kernel.org archive links when possible

arch/arm/mach-omap2/omap_phy_internal.c
WARNING: Block comments should align the * on each line

arch/arm/mach-omap2/sdrc2xxx.c
WARNING: It's generally not useful to have the filename in the file

arch/arm/mach-omap2/ti81xx-restart.c
ERROR: trailing statements should be on next line

Signed-off-by: Franziska Naepelt <franziska.naepelt@gmail.com>
Message-ID: <20230531170427.42199-1-franziska.naepelt@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/mach-omap2/omap-wakeupgen.c
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
arch/arm/mach-omap2/omap_phy_internal.c
arch/arm/mach-omap2/sdrc2xxx.c
arch/arm/mach-omap2/ti81xx-restart.c

index 8d21e3a..6f0d612 100644 (file)
@@ -374,6 +374,7 @@ static void irq_restore_context(void)
 static void irq_save_secure_context(void)
 {
        u32 ret;
+
        ret = omap_secure_dispatcher(OMAP4_HAL_SAVEGIC_INDEX,
                                FLAG_START_CRITICAL,
                                0, 0, 0, 0, 0);
index cb33f03..5cbdf58 100644 (file)
@@ -1851,7 +1851,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
        .fw = {
                .omap2 = {
                        .l4_fw_region  = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
-                       .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP ,
+                       .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
                        .flags  = OMAP_FIREWALL_L4,
                },
        },
@@ -2172,7 +2172,7 @@ static struct omap_hwmod am35xx_emac_hwmod = {
        /*
         * According to Mark Greer, the MPU will not return from WFI
         * when the EMAC signals an interrupt.
-        * http://www.spinics.net/lists/arm-kernel/msg174734.html
+        * https://lore.kernel.org/all/1336770778-23044-3-git-send-email-mgreer@animalcreek.com/
         */
        .flags          = (HWMOD_NO_IDLEST | HWMOD_BLOCK_WFI),
 };
@@ -2346,13 +2346,12 @@ static struct omap_hwmod_ocp_if *omap36xx_sham_hwmod_ocp_ifs[] __initdata = {
        NULL
 };
 
-
 /*
  * Apparently the SHA/MD5 and AES accelerator IP blocks are
  * only present on some AM35xx chips, and no one knows which
- * ones.  See
- * http://www.spinics.net/lists/arm-kernel/msg215466.html So
- * if you need these IP blocks on an AM35xx, try uncommenting
+ * ones.
+ * See https://lore.kernel.org/all/20130108203853.GB1876@animalcreek.com/
+ * So if you need these IP blocks on an AM35xx, try uncommenting
  * the following lines.
  */
 static struct omap_hwmod_ocp_if *am35xx_sham_hwmod_ocp_ifs[] __initdata = {
index 21c6e79..a1d0011 100644 (file)
@@ -1,11 +1,11 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 /*
 * This file configures the internal USB PHY in OMAP4430. Used
 * with TWL6030 transceiver and MUSB on OMAP4430.
 *
 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com
 * Author: Hema HK <hemahk@ti.com>
 */
+ * This file configures the internal USB PHY in OMAP4430. Used
+ * with TWL6030 transceiver and MUSB on OMAP4430.
+ *
+ * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com
+ * Author: Hema HK <hemahk@ti.com>
+ */
 
 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 
index 529d46c..5a275b4 100644 (file)
@@ -1,7 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * linux/arch/arm/mach-omap2/sdrc2xxx.c
- *
  * SDRAM timing related functions for OMAP2xxx
  *
  * Copyright (C) 2005, 2008 Texas Instruments Inc.
index d6dc518..5b5fb37 100644 (file)
@@ -26,5 +26,6 @@ void ti81xx_restart(enum reboot_mode mode, const char *cmd)
 {
        omap2_prm_set_mod_reg_bits(TI81XX_GLOBAL_RST_COLD, 0,
                                   TI81XX_PRM_DEVICE_RSTCTRL);
-       while (1);
+       while (1)
+               ;
 }