powerpc/64s/exception: Remove the SPR saving patch code macros
authorNicholas Piggin <npiggin@gmail.com>
Tue, 25 Feb 2020 17:35:23 +0000 (03:35 +1000)
committerMichael Ellerman <mpe@ellerman.id.au>
Wed, 1 Apr 2020 02:42:11 +0000 (13:42 +1100)
These are used infrequently enough they don't provide much help, so
inline them.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200225173541.1549955-15-npiggin@gmail.com
arch/powerpc/kernel/exceptions-64s.S

index 3609604..0ea5ba1 100644 (file)
@@ -110,46 +110,6 @@ name:
 #define EXC_HV         1
 #define EXC_STD                0
 
-/*
- * PPR save/restore macros used in exceptions-64s.S
- * Used for P7 or later processors
- */
-#define SAVE_PPR(area, ra)                                             \
-BEGIN_FTR_SECTION_NESTED(940)                                          \
-       ld      ra,area+EX_PPR(r13);    /* Read PPR from paca */        \
-       std     ra,_PPR(r1);                                            \
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
-
-#define RESTORE_PPR_PACA(area, ra)                                     \
-BEGIN_FTR_SECTION_NESTED(941)                                          \
-       ld      ra,area+EX_PPR(r13);                                    \
-       mtspr   SPRN_PPR,ra;                                            \
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
-
-/*
- * Get an SPR into a register if the CPU has the given feature
- */
-#define OPT_GET_SPR(ra, spr, ftr)                                      \
-BEGIN_FTR_SECTION_NESTED(943)                                          \
-       mfspr   ra,spr;                                                 \
-END_FTR_SECTION_NESTED(ftr,ftr,943)
-
-/*
- * Set an SPR from a register if the CPU has the given feature
- */
-#define OPT_SET_SPR(ra, spr, ftr)                                      \
-BEGIN_FTR_SECTION_NESTED(943)                                          \
-       mtspr   spr,ra;                                                 \
-END_FTR_SECTION_NESTED(ftr,ftr,943)
-
-/*
- * Save a register to the PACA if the CPU has the given feature
- */
-#define OPT_SAVE_REG_TO_PACA(offset, ra, ftr)                          \
-BEGIN_FTR_SECTION_NESTED(943)                                          \
-       std     ra,offset(r13);                                         \
-END_FTR_SECTION_NESTED(ftr,ftr,943)
-
 /*
  * Branch to label using its 0xC000 address. This results in instruction
  * address suitable for MSR[IR]=0 or 1, which allows relocation to be turned
@@ -278,18 +238,18 @@ do_define_int n
        cmpwi   r10,KVM_GUEST_MODE_SKIP
        beq     89f
        .else
-BEGIN_FTR_SECTION_NESTED(947)
+BEGIN_FTR_SECTION
        ld      r10,IAREA+EX_CFAR(r13)
        std     r10,HSTATE_CFAR(r13)
-END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947)
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
        .endif
 
        ld      r10,PACA_EXGEN+EX_CTR(r13)
        mtctr   r10
-BEGIN_FTR_SECTION_NESTED(948)
+BEGIN_FTR_SECTION
        ld      r10,IAREA+EX_PPR(r13)
        std     r10,HSTATE_PPR(r13)
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
        ld      r11,IAREA+EX_R11(r13)
        ld      r12,IAREA+EX_R12(r13)
        std     r12,HSTATE_SCRATCH0(r13)
@@ -386,10 +346,14 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
        SET_SCRATCH0(r13)                       /* save r13 */
        GET_PACA(r13)
        std     r9,IAREA+EX_R9(r13)             /* save r9 */
-       OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR)
+BEGIN_FTR_SECTION
+       mfspr   r9,SPRN_PPR
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
        HMT_MEDIUM
        std     r10,IAREA+EX_R10(r13)           /* save r10 - r12 */
-       OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
+BEGIN_FTR_SECTION
+       mfspr   r10,SPRN_CFAR
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
        .if \ool
        .if !\virt
        b       tramp_real_\name
@@ -402,8 +366,12 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
        .endif
        .endif
 
-       OPT_SAVE_REG_TO_PACA(IAREA+EX_PPR, r9, CPU_FTR_HAS_PPR)
-       OPT_SAVE_REG_TO_PACA(IAREA+EX_CFAR, r10, CPU_FTR_CFAR)
+BEGIN_FTR_SECTION
+       std     r9,IAREA+EX_PPR(r13)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
+BEGIN_FTR_SECTION
+       std     r10,IAREA+EX_CFAR(r13)
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
        INTERRUPT_TO_KERNEL
        mfctr   r10
        std     r10,IAREA+EX_CTR(r13)
@@ -572,7 +540,10 @@ DEFINE_FIXED_SYMBOL(\name\()_common_real)
        .endif
        beq     101f                    /* if from kernel mode          */
        ACCOUNT_CPU_USER_ENTRY(r13, r9, r10)
-       SAVE_PPR(IAREA, r9)
+BEGIN_FTR_SECTION
+       ld      r9,IAREA+EX_PPR(r13)    /* Read PPR from paca           */
+       std     r9,_PPR(r1)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 101:
        .else
        .if IKUAP
@@ -612,10 +583,10 @@ DEFINE_FIXED_SYMBOL(\name\()_common_real)
        std     r10,_DSISR(r1)
        .endif
 
-BEGIN_FTR_SECTION_NESTED(66)
+BEGIN_FTR_SECTION
        ld      r10,IAREA+EX_CFAR(r13)
        std     r10,ORIG_GPR3(r1)
-END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66)
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
        ld      r10,IAREA+EX_CTR(r13)
        std     r10,_CTR(r1)
        std     r2,GPR2(r1)             /* save r2 in stackframe        */
@@ -1699,10 +1670,10 @@ TRAMP_REAL_BEGIN(system_call_kvm)
          * HMT_MEDIUM. That allows the KVM code to save that value into the
          * guest state (it is the guest's PPR value).
          */
-BEGIN_FTR_SECTION_NESTED(948)
+BEGIN_FTR_SECTION
        mfspr   r10,SPRN_PPR
        std     r10,HSTATE_PPR(r13)
-END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948)
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
        HMT_MEDIUM
        mfctr   r10
        SET_SCRATCH0(r10)
@@ -2259,7 +2230,10 @@ denorm_done:
        mtspr   SPRN_HSRR0,r11
        mtcrf   0x80,r9
        ld      r9,PACA_EXGEN+EX_R9(r13)
-       RESTORE_PPR_PACA(PACA_EXGEN, r10)
+BEGIN_FTR_SECTION
+       ld      r10,PACA_EXGEN+EX_PPR(r13)
+       mtspr   SPRN_PPR,r10
+END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 BEGIN_FTR_SECTION
        ld      r10,PACA_EXGEN+EX_CFAR(r13)
        mtspr   SPRN_CFAR,r10