clocksource/drivers/riscv_timer: Provide the sched_clock

Currently, we don't have a sched_clock registered for RISC-V systems.
This means Linux time keeping will use jiffies (running at HZ) as the
default sched_clock.

To avoid this, we explicity provide sched_clock using RISC-V rdtime
instruction (similar to riscv_timer clocksource).

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index c57b156..a4ae339 100644 (file)
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -599,7 +599,7 @@ config ATCPIT100_TIMER
 
 config RISCV_TIMER
        bool "Timer for the RISC-V platform"
-       depends on RISCV
+       depends on GENERIC_SCHED_CLOCK && RISCV
        default y
        select TIMER_PROBE
        select TIMER_OF

diff --git a/drivers/clocksource/riscv_timer.c b/drivers/clocksource/riscv_timer.c
index 084e97d..4318922 100644 (file)
--- a/drivers/clocksource/riscv_timer.c
+++ b/drivers/clocksource/riscv_timer.c
@@ -8,6 +8,7 @@
 #include <linux/cpu.h>
 #include <linux/delay.h>
 #include <linux/irq.h>
+#include <linux/sched_clock.h>
 #include <asm/smp.h>
 #include <asm/sbi.h>
 
@@ -49,6 +50,11 @@ static unsigned long long riscv_clocksource_rdtime(struct clocksource *cs)
        return get_cycles64();
 }
 
+static u64 riscv_sched_clock(void)
+{
+       return get_cycles64();
+}
+
 static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
        .name           = "riscv_clocksource",
        .rating         = 300,
@@ -97,6 +103,9 @@ static int __init riscv_timer_init_dt(struct device_node *n)
        cs = per_cpu_ptr(&riscv_clocksource, cpuid);
        clocksource_register_hz(cs, riscv_timebase);
 
+       sched_clock_register(riscv_sched_clock,
+                       BITS_PER_LONG, riscv_timebase);
+
        error = cpuhp_setup_state(CPUHP_AP_RISCV_TIMER_STARTING,
                         "clockevents/riscv/timer:starting",
                         riscv_timer_starting_cpu, riscv_timer_dying_cpu);