../mips/index
nios2/index
openrisc/index
- ../parisc/index
+ parisc/index
../powerpc/index
../riscv/index
../s390/index
--- /dev/null
+=================
+PA-RISC Debugging
+=================
+
+okay, here are some hints for debugging the lower-level parts of
+linux/parisc.
+
+
+1. Absolute addresses
+=====================
+
+A lot of the assembly code currently runs in real mode, which means
+absolute addresses are used instead of virtual addresses as in the
+rest of the kernel. To translate an absolute address to a virtual
+address you can lookup in System.map, add __PAGE_OFFSET (0x10000000
+currently).
+
+
+2. HPMCs
+========
+
+When real-mode code tries to access non-existent memory, you'll get
+an HPMC instead of a kernel oops. To debug an HPMC, try to find
+the System Responder/Requestor addresses. The System Requestor
+address should match (one of the) processor HPAs (high addresses in
+the I/O range); the System Responder address is the address real-mode
+code tried to access.
+
+Typical values for the System Responder address are addresses larger
+than __PAGE_OFFSET (0x10000000) which mean a virtual address didn't
+get translated to a physical address before real-mode code tried to
+access it.
+
+
+3. Q bit fun
+============
+
+Certain, very critical code has to clear the Q bit in the PSW. What
+happens when the Q bit is cleared is the CPU does not update the
+registers interruption handlers read to find out where the machine
+was interrupted - so if you get an interruption between the instruction
+that clears the Q bit and the RFI that sets it again you don't know
+where exactly it happened. If you're lucky the IAOQ will point to the
+instruction that cleared the Q bit, if you're not it points anywhere
+at all. Usually Q bit problems will show themselves in unexplainable
+system hangs or running off the end of physical memory.
--- /dev/null
+.. SPDX-License-Identifier: GPL-2.0
+
+.. kernel-feat:: $srctree/Documentation/features parisc
--- /dev/null
+.. SPDX-License-Identifier: GPL-2.0
+
+====================
+PA-RISC Architecture
+====================
+
+.. toctree::
+ :maxdepth: 2
+
+ debugging
+ registers
+
+ features
+
+.. only:: subproject and html
+
+ Indices
+ =======
+
+ * :ref:`genindex`
--- /dev/null
+================================
+Register Usage for Linux/PA-RISC
+================================
+
+[ an asterisk is used for planned usage which is currently unimplemented ]
+
+General Registers as specified by ABI
+=====================================
+
+Control Registers
+-----------------
+
+=============================== ===============================================
+CR 0 (Recovery Counter) used for ptrace
+CR 1-CR 7(undefined) unused
+CR 8 (Protection ID) per-process value*
+CR 9, 12, 13 (PIDS) unused
+CR10 (CCR) lazy FPU saving*
+CR11 as specified by ABI (SAR)
+CR14 (interruption vector) initialized to fault_vector
+CR15 (EIEM) initialized to all ones*
+CR16 (Interval Timer) read for cycle count/write starts Interval Tmr
+CR17-CR22 interruption parameters
+CR19 Interrupt Instruction Register
+CR20 Interrupt Space Register
+CR21 Interrupt Offset Register
+CR22 Interrupt PSW
+CR23 (EIRR) read for pending interrupts/write clears bits
+CR24 (TR 0) Kernel Space Page Directory Pointer
+CR25 (TR 1) User Space Page Directory Pointer
+CR26 (TR 2) not used
+CR27 (TR 3) Thread descriptor pointer
+CR28 (TR 4) not used
+CR29 (TR 5) not used
+CR30 (TR 6) current / 0
+CR31 (TR 7) Temporary register, used in various places
+=============================== ===============================================
+
+Space Registers (kernel mode)
+-----------------------------
+
+=============================== ===============================================
+SR0 temporary space register
+SR4-SR7 set to 0
+SR1 temporary space register
+SR2 kernel should not clobber this
+SR3 used for userspace accesses (current process)
+=============================== ===============================================
+
+Space Registers (user mode)
+---------------------------
+
+=============================== ===============================================
+SR0 temporary space register
+SR1 temporary space register
+SR2 holds space of linux gateway page
+SR3 holds user address space value while in kernel
+SR4-SR7 Defines short address space for user/kernel
+=============================== ===============================================
+
+
+Processor Status Word
+---------------------
+
+=============================== ===============================================
+W (64-bit addresses) 0
+E (Little-endian) 0
+S (Secure Interval Timer) 0
+T (Taken Branch Trap) 0
+H (Higher-privilege trap) 0
+L (Lower-privilege trap) 0
+N (Nullify next instruction) used by C code
+X (Data memory break disable) 0
+B (Taken Branch) used by C code
+C (code address translation) 1, 0 while executing real-mode code
+V (divide step correction) used by C code
+M (HPMC mask) 0, 1 while executing HPMC handler*
+C/B (carry/borrow bits) used by C code
+O (ordered references) 1*
+F (performance monitor) 0
+R (Recovery Counter trap) 0
+Q (collect interruption state) 1 (0 in code directly preceding an rfi)
+P (Protection Identifiers) 1*
+D (Data address translation) 1, 0 while executing real-mode code
+I (external interrupt mask) used by cli()/sti() macros
+=============================== ===============================================
+
+"Invisible" Registers
+---------------------
+
+=============================== ===============================================
+PSW default W value 0
+PSW default E value 0
+Shadow Registers used by interruption handler code
+TOC enable bit 1
+=============================== ===============================================
+
+-------------------------------------------------------------------------
+
+The PA-RISC architecture defines 7 registers as "shadow registers".
+Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
+the state save and restore time by eliminating the need for general register
+(GR) saves and restores in interruption handlers.
+Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
+
+-------------------------------------------------------------------------
+
+Register usage notes, originally from John Marvin, with some additional
+notes from Randolph Chung.
+
+For the general registers:
+
+r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
+course, you need to save them if you care about them, before calling
+another procedure. Some of the above registers do have special meanings
+that you should be aware of:
+
+ r1:
+ The addil instruction is hardwired to place its result in r1,
+ so if you use that instruction be aware of that.
+
+ r2:
+ This is the return pointer. In general you don't want to
+ use this, since you need the pointer to get back to your
+ caller. However, it is grouped with this set of registers
+ since the caller can't rely on the value being the same
+ when you return, i.e. you can copy r2 to another register
+ and return through that register after trashing r2, and
+ that should not cause a problem for the calling routine.
+
+ r19-r22:
+ these are generally regarded as temporary registers.
+ Note that in 64 bit they are arg7-arg4.
+
+ r23-r26:
+ these are arg3-arg0, i.e. you can use them if you
+ don't care about the values that were passed in anymore.
+
+ r28,r29:
+ are ret0 and ret1. They are what you pass return values
+ in. r28 is the primary return. When returning small structures
+ r29 may also be used to pass data back to the caller.
+
+ r30:
+ stack pointer
+
+ r31:
+ the ble instruction puts the return pointer in here.
+
+
+ r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
+ general purpose registers. r27 is the data pointer, and is
+ used to make references to global variables easier. r30 is
+ the stack pointer.
+++ /dev/null
-=================
-PA-RISC Debugging
-=================
-
-okay, here are some hints for debugging the lower-level parts of
-linux/parisc.
-
-
-1. Absolute addresses
-=====================
-
-A lot of the assembly code currently runs in real mode, which means
-absolute addresses are used instead of virtual addresses as in the
-rest of the kernel. To translate an absolute address to a virtual
-address you can lookup in System.map, add __PAGE_OFFSET (0x10000000
-currently).
-
-
-2. HPMCs
-========
-
-When real-mode code tries to access non-existent memory, you'll get
-an HPMC instead of a kernel oops. To debug an HPMC, try to find
-the System Responder/Requestor addresses. The System Requestor
-address should match (one of the) processor HPAs (high addresses in
-the I/O range); the System Responder address is the address real-mode
-code tried to access.
-
-Typical values for the System Responder address are addresses larger
-than __PAGE_OFFSET (0x10000000) which mean a virtual address didn't
-get translated to a physical address before real-mode code tried to
-access it.
-
-
-3. Q bit fun
-============
-
-Certain, very critical code has to clear the Q bit in the PSW. What
-happens when the Q bit is cleared is the CPU does not update the
-registers interruption handlers read to find out where the machine
-was interrupted - so if you get an interruption between the instruction
-that clears the Q bit and the RFI that sets it again you don't know
-where exactly it happened. If you're lucky the IAOQ will point to the
-instruction that cleared the Q bit, if you're not it points anywhere
-at all. Usually Q bit problems will show themselves in unexplainable
-system hangs or running off the end of physical memory.
+++ /dev/null
-.. SPDX-License-Identifier: GPL-2.0
-
-.. kernel-feat:: $srctree/Documentation/features parisc
+++ /dev/null
-.. SPDX-License-Identifier: GPL-2.0
-
-====================
-PA-RISC Architecture
-====================
-
-.. toctree::
- :maxdepth: 2
-
- debugging
- registers
-
- features
-
-.. only:: subproject and html
-
- Indices
- =======
-
- * :ref:`genindex`
+++ /dev/null
-================================
-Register Usage for Linux/PA-RISC
-================================
-
-[ an asterisk is used for planned usage which is currently unimplemented ]
-
-General Registers as specified by ABI
-=====================================
-
-Control Registers
------------------
-
-=============================== ===============================================
-CR 0 (Recovery Counter) used for ptrace
-CR 1-CR 7(undefined) unused
-CR 8 (Protection ID) per-process value*
-CR 9, 12, 13 (PIDS) unused
-CR10 (CCR) lazy FPU saving*
-CR11 as specified by ABI (SAR)
-CR14 (interruption vector) initialized to fault_vector
-CR15 (EIEM) initialized to all ones*
-CR16 (Interval Timer) read for cycle count/write starts Interval Tmr
-CR17-CR22 interruption parameters
-CR19 Interrupt Instruction Register
-CR20 Interrupt Space Register
-CR21 Interrupt Offset Register
-CR22 Interrupt PSW
-CR23 (EIRR) read for pending interrupts/write clears bits
-CR24 (TR 0) Kernel Space Page Directory Pointer
-CR25 (TR 1) User Space Page Directory Pointer
-CR26 (TR 2) not used
-CR27 (TR 3) Thread descriptor pointer
-CR28 (TR 4) not used
-CR29 (TR 5) not used
-CR30 (TR 6) current / 0
-CR31 (TR 7) Temporary register, used in various places
-=============================== ===============================================
-
-Space Registers (kernel mode)
------------------------------
-
-=============================== ===============================================
-SR0 temporary space register
-SR4-SR7 set to 0
-SR1 temporary space register
-SR2 kernel should not clobber this
-SR3 used for userspace accesses (current process)
-=============================== ===============================================
-
-Space Registers (user mode)
----------------------------
-
-=============================== ===============================================
-SR0 temporary space register
-SR1 temporary space register
-SR2 holds space of linux gateway page
-SR3 holds user address space value while in kernel
-SR4-SR7 Defines short address space for user/kernel
-=============================== ===============================================
-
-
-Processor Status Word
----------------------
-
-=============================== ===============================================
-W (64-bit addresses) 0
-E (Little-endian) 0
-S (Secure Interval Timer) 0
-T (Taken Branch Trap) 0
-H (Higher-privilege trap) 0
-L (Lower-privilege trap) 0
-N (Nullify next instruction) used by C code
-X (Data memory break disable) 0
-B (Taken Branch) used by C code
-C (code address translation) 1, 0 while executing real-mode code
-V (divide step correction) used by C code
-M (HPMC mask) 0, 1 while executing HPMC handler*
-C/B (carry/borrow bits) used by C code
-O (ordered references) 1*
-F (performance monitor) 0
-R (Recovery Counter trap) 0
-Q (collect interruption state) 1 (0 in code directly preceding an rfi)
-P (Protection Identifiers) 1*
-D (Data address translation) 1, 0 while executing real-mode code
-I (external interrupt mask) used by cli()/sti() macros
-=============================== ===============================================
-
-"Invisible" Registers
----------------------
-
-=============================== ===============================================
-PSW default W value 0
-PSW default E value 0
-Shadow Registers used by interruption handler code
-TOC enable bit 1
-=============================== ===============================================
-
--------------------------------------------------------------------------
-
-The PA-RISC architecture defines 7 registers as "shadow registers".
-Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
-the state save and restore time by eliminating the need for general register
-(GR) saves and restores in interruption handlers.
-Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
-
--------------------------------------------------------------------------
-
-Register usage notes, originally from John Marvin, with some additional
-notes from Randolph Chung.
-
-For the general registers:
-
-r1,r2,r19-r26,r28,r29 & r31 can be used without saving them first. And of
-course, you need to save them if you care about them, before calling
-another procedure. Some of the above registers do have special meanings
-that you should be aware of:
-
- r1:
- The addil instruction is hardwired to place its result in r1,
- so if you use that instruction be aware of that.
-
- r2:
- This is the return pointer. In general you don't want to
- use this, since you need the pointer to get back to your
- caller. However, it is grouped with this set of registers
- since the caller can't rely on the value being the same
- when you return, i.e. you can copy r2 to another register
- and return through that register after trashing r2, and
- that should not cause a problem for the calling routine.
-
- r19-r22:
- these are generally regarded as temporary registers.
- Note that in 64 bit they are arg7-arg4.
-
- r23-r26:
- these are arg3-arg0, i.e. you can use them if you
- don't care about the values that were passed in anymore.
-
- r28,r29:
- are ret0 and ret1. They are what you pass return values
- in. r28 is the primary return. When returning small structures
- r29 may also be used to pass data back to the caller.
-
- r30:
- stack pointer
-
- r31:
- the ble instruction puts the return pointer in here.
-
-
- r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
- general purpose registers. r27 is the data pointer, and is
- used to make references to global variables easier. r30 is
- the stack pointer.
../arm64/index
../riscv/index
openrisc/index
- ../parisc/index
+ parisc/index
../loongarch/index
TODOList:
--- /dev/null
+.. include:: ../../disclaimer-zh_CN.rst
+
+:Original: Documentation/arch/parisc/debugging.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+.. _cn_parisc_debugging:
+
+=================
+调试PA-RISC
+=================
+
+好吧，这里有一些关于调试linux/parisc的较底层部分的信息。
+
+
+1. 绝对地址
+=====================
+
+很多汇编代码目前运行在实模式下，这意味着会使用绝对地址，而不是像内核其他
+部分那样使用虚拟地址。要将绝对地址转换为虚拟地址，你可以在System.map中查
+找，添加__PAGE_OFFSET（目前是0x10000000）。
+
+
+2. HPMCs
+========
+
+当实模式的代码试图访问不存在的内存时，会出现HPMC（high priority machine
+check）而不是内核oops。若要调试HPMC，请尝试找到系统响应程序/请求程序地址。
+系统请求程序地址应该与（某）处理器的HPA（I/O范围内的高地址）相匹配；系统响应程
+序地址是实模式代码试图访问的地址。
+
+系统响应程序地址的典型值是大于__PAGE_OFFSET （0x10000000）的地址，这意味着
+在实模式试图访问它之前，虚拟地址没有被翻译成物理地址。
+
+
+3. 有趣的Q位
+============
+
+某些非常关键的代码必须清除PSW中的Q位。当Q位被清除时，CPU不会更新中断处理
+程序所读取的寄存器，以找出机器被中断的位置——所以如果你在清除Q位的指令和再
+次设置Q位的RFI之间遇到中断，你不知道它到底发生在哪里。如果你幸运的话，IAOQ
+会指向清除Q位的指令，如果你不幸运的话，它会指向任何地方。通常Q位的问题会
+表现为无法解释的系统挂起或物理内存越界。
--- /dev/null
+.. SPDX-License-Identifier: GPL-2.0
+.. include:: ../../disclaimer-zh_CN.rst
+
+:Original: Documentation/arch/parisc/index.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+.. _cn_parisc_index:
+
+====================
+PA-RISC体系架构
+====================
+
+.. toctree::
+ :maxdepth: 2
+
+ debugging
+ registers
+
+Todolist:
+
+ features
+
+.. only:: subproject and html
+
+ Indices
+ =======
+
+ * :ref:`genindex`
--- /dev/null
+.. include:: ../../disclaimer-zh_CN.rst
+
+:Original: Documentation/arch/parisc/registers.rst
+
+:翻译:
+
+ 司延腾 Yanteng Si <siyanteng@loongson.cn>
+
+.. _cn_parisc_registers:
+
+=========================
+Linux/PA-RISC的寄存器用法
+=========================
+
+[ 用星号表示目前尚未实现的计划用途。 ]
+
+ABI约定的通用寄存器
+===================
+
+控制寄存器
+----------
+
+============================ =================================
+CR 0 (恢复计数器) 用于ptrace
+CR 1-CR 7(无定义) 未使用
+CR 8 (Protection ID) 每进程值*
+CR 9, 12, 13 (PIDS) 未使用
+CR10 (CCR) FPU延迟保存*
+CR11 按照ABI的规定（SAR）
+CR14 (中断向量) 初始化为 fault_vector
+CR15 (EIEM) 所有位初始化为1*
+CR16 (间隔计时器) 读取周期数/写入开始时间间隔计时器
+CR17-CR22 中断参数
+CR19 中断指令寄存器
+CR20 中断空间寄存器
+CR21 中断偏移量寄存器
+CR22 中断 PSW
+CR23 (EIRR) 读取未决中断/写入清除位
+CR24 (TR 0) 内核空间页目录指针
+CR25 (TR 1) 用户空间页目录指针
+CR26 (TR 2) 不使用
+CR27 (TR 3) 线程描述符指针
+CR28 (TR 4) 不使用
+CR29 (TR 5) 不使用
+CR30 (TR 6) 当前 / 0
+CR31 (TR 7) 临时寄存器，在不同地方使用
+============================ =================================
+
+空间寄存器（内核模式）
+----------------------
+
+======== ==============================
+SR0 临时空间寄存器
+SR4-SR7 设置为0
+SR1 临时空间寄存器
+SR2 内核不应该破坏它
+SR3 用于用户空间访问（当前进程）
+======== ==============================
+
+空间寄存器（用户模式）
+----------------------
+
+======== ============================
+SR0 临时空间寄存器
+SR1 临时空间寄存器
+SR2 保存Linux gateway page的空间
+SR3 在内核中保存用户地址空间的值
+SR4-SR7 定义了用户/内核的短地址空间
+======== ============================
+
+
+处理器状态字
+------------
+
+====================== ================================================
+W （64位地址） 0
+E （小尾端） 0
+S （安全间隔计时器） 0
+T （产生分支陷阱） 0
+H （高特权级陷阱） 0
+L （低特权级陷阱） 0
+N （撤销下一条指令） 被C代码使用
+X （数据存储中断禁用） 0
+B （产生分支） 被C代码使用
+C （代码地址转译） 1, 在执行实模式代码时为0
+V （除法步长校正） 被C代码使用
+M （HPMC 掩码） 0, 在执行HPMC操作*时为1
+C/B （进/借 位） 被C代码使用
+O （有序引用） 1*
+F （性能监视器） 0
+R （回收计数器陷阱） 0
+Q （收集中断状态） 1 （在rfi之前的代码中为0）
+P （保护标识符） 1*
+D （数据地址转译） 1, 在执行实模式代码时为0
+I （外部中断掩码） 由cli()/sti()宏使用。
+====================== ================================================
+
+“隐形”寄存器（影子寄存器）
+---------------------------
+
+============= ===================
+PSW W 默认值 0
+PSW E 默认值 0
+影子寄存器 被中断处理代码使用
+TOC启用位 1
+============= ===================
+
+----------------------------------------------------------
+
+PA-RISC架构定义了7个寄存器作为“影子寄存器”。这些寄存器在
+RETURN FROM INTERRUPTION AND RESTORE指令中使用，通过消
+除中断处理程序中对一般寄存器（GR）的保存和恢复的需要来减
+少状态保存和恢复时间。影子寄存器是GRs 1, 8, 9, 16, 17,
+24和25。
+
+-------------------------------------------------------------------------
+
+寄存器使用说明，最初由John Marvin提供，并由Randolph Chung提供一些补充说明。
+
+对于通用寄存器:
+
+r1,r2,r19-r26,r28,r29 & r31可以在不保存它们的情况下被使用。当然，如果你
+关心它们，在调用另一个程序之前，你也需要保存它们。上面的一些寄存器确实
+有特殊的含义，你应该注意一下:
+
+ r1:
+ addil指令是硬性规定将其结果放在r1中，所以如果你使用这条指令要
+ 注意这点。
+
+ r2:
+ 这就是返回指针。一般来说，你不想使用它，因为你需要这个指针来返
+ 回给你的调用者。然而，它与这组寄存器组合在一起，因为调用者不能
+ 依赖你返回时的值是相同的，也就是说，你可以将r2复制到另一个寄存
+ 器，并在作废r2后通过该寄存器返回，这应该不会给调用程序带来问题。
+
+ r19-r22:
+ 这些通常被认为是临时寄存器。
+ 请注意，在64位中它们是arg7-arg4。
+
+ r23-r26:
+ 这些是arg3-arg0，也就是说，如果你不再关心传入的值，你可以使用
+ 它们。
+
+ r28,r29:
+ 这俩是ret0和ret1。它们是你传入返回值的地方。r28是主返回值。当返回
+ 小结构体时，r29也可以用来将数据传回给调用程序。
+
+ r30:
+ 栈指针
+
+ r31:
+ ble指令将返回指针放在这里。
+
+
+ r3-r18,r27,r30需要被保存和恢复。r3-r18只是一般用途的寄存器。
+ r27是数据指针，用来使对全局变量的引用更容易。r30是栈指针。
+++ /dev/null
-.. include:: ../disclaimer-zh_CN.rst
-
-:Original: Documentation/parisc/debugging.rst
-
-:翻译:
-
- 司延腾 Yanteng Si <siyanteng@loongson.cn>
-
-.. _cn_parisc_debugging:
-
-=================
-调试PA-RISC
-=================
-
-好吧，这里有一些关于调试linux/parisc的较底层部分的信息。
-
-
-1. 绝对地址
-=====================
-
-很多汇编代码目前运行在实模式下，这意味着会使用绝对地址，而不是像内核其他
-部分那样使用虚拟地址。要将绝对地址转换为虚拟地址，你可以在System.map中查
-找，添加__PAGE_OFFSET（目前是0x10000000）。
-
-
-2. HPMCs
-========
-
-当实模式的代码试图访问不存在的内存时，会出现HPMC（high priority machine
-check）而不是内核oops。若要调试HPMC，请尝试找到系统响应程序/请求程序地址。
-系统请求程序地址应该与（某）处理器的HPA（I/O范围内的高地址）相匹配；系统响应程
-序地址是实模式代码试图访问的地址。
-
-系统响应程序地址的典型值是大于__PAGE_OFFSET （0x10000000）的地址，这意味着
-在实模式试图访问它之前，虚拟地址没有被翻译成物理地址。
-
-
-3. 有趣的Q位
-============
-
-某些非常关键的代码必须清除PSW中的Q位。当Q位被清除时，CPU不会更新中断处理
-程序所读取的寄存器，以找出机器被中断的位置——所以如果你在清除Q位的指令和再
-次设置Q位的RFI之间遇到中断，你不知道它到底发生在哪里。如果你幸运的话，IAOQ
-会指向清除Q位的指令，如果你不幸运的话，它会指向任何地方。通常Q位的问题会
-表现为无法解释的系统挂起或物理内存越界。
+++ /dev/null
-.. SPDX-License-Identifier: GPL-2.0
-.. include:: ../disclaimer-zh_CN.rst
-
-:Original: Documentation/parisc/index.rst
-
-:翻译:
-
- 司延腾 Yanteng Si <siyanteng@loongson.cn>
-
-.. _cn_parisc_index:
-
-====================
-PA-RISC体系架构
-====================
-
-.. toctree::
- :maxdepth: 2
-
- debugging
- registers
-
-Todolist:
-
- features
-
-.. only:: subproject and html
-
- Indices
- =======
-
- * :ref:`genindex`
+++ /dev/null
-.. include:: ../disclaimer-zh_CN.rst
-
-:Original: Documentation/parisc/registers.rst
-
-:翻译:
-
- 司延腾 Yanteng Si <siyanteng@loongson.cn>
-
-.. _cn_parisc_registers:
-
-=========================
-Linux/PA-RISC的寄存器用法
-=========================
-
-[ 用星号表示目前尚未实现的计划用途。 ]
-
-ABI约定的通用寄存器
-===================
-
-控制寄存器
-----------
-
-============================ =================================
-CR 0 (恢复计数器) 用于ptrace
-CR 1-CR 7(无定义) 未使用
-CR 8 (Protection ID) 每进程值*
-CR 9, 12, 13 (PIDS) 未使用
-CR10 (CCR) FPU延迟保存*
-CR11 按照ABI的规定（SAR）
-CR14 (中断向量) 初始化为 fault_vector
-CR15 (EIEM) 所有位初始化为1*
-CR16 (间隔计时器) 读取周期数/写入开始时间间隔计时器
-CR17-CR22 中断参数
-CR19 中断指令寄存器
-CR20 中断空间寄存器
-CR21 中断偏移量寄存器
-CR22 中断 PSW
-CR23 (EIRR) 读取未决中断/写入清除位
-CR24 (TR 0) 内核空间页目录指针
-CR25 (TR 1) 用户空间页目录指针
-CR26 (TR 2) 不使用
-CR27 (TR 3) 线程描述符指针
-CR28 (TR 4) 不使用
-CR29 (TR 5) 不使用
-CR30 (TR 6) 当前 / 0
-CR31 (TR 7) 临时寄存器，在不同地方使用
-============================ =================================
-
-空间寄存器（内核模式）
-----------------------
-
-======== ==============================
-SR0 临时空间寄存器
-SR4-SR7 设置为0
-SR1 临时空间寄存器
-SR2 内核不应该破坏它
-SR3 用于用户空间访问（当前进程）
-======== ==============================
-
-空间寄存器（用户模式）
-----------------------
-
-======== ============================
-SR0 临时空间寄存器
-SR1 临时空间寄存器
-SR2 保存Linux gateway page的空间
-SR3 在内核中保存用户地址空间的值
-SR4-SR7 定义了用户/内核的短地址空间
-======== ============================
-
-
-处理器状态字
-------------
-
-====================== ================================================
-W （64位地址） 0
-E （小尾端） 0
-S （安全间隔计时器） 0
-T （产生分支陷阱） 0
-H （高特权级陷阱） 0
-L （低特权级陷阱） 0
-N （撤销下一条指令） 被C代码使用
-X （数据存储中断禁用） 0
-B （产生分支） 被C代码使用
-C （代码地址转译） 1, 在执行实模式代码时为0
-V （除法步长校正） 被C代码使用
-M （HPMC 掩码） 0, 在执行HPMC操作*时为1
-C/B （进/借 位） 被C代码使用
-O （有序引用） 1*
-F （性能监视器） 0
-R （回收计数器陷阱） 0
-Q （收集中断状态） 1 （在rfi之前的代码中为0）
-P （保护标识符） 1*
-D （数据地址转译） 1, 在执行实模式代码时为0
-I （外部中断掩码） 由cli()/sti()宏使用。
-====================== ================================================
-
-“隐形”寄存器（影子寄存器）
----------------------------
-
-============= ===================
-PSW W 默认值 0
-PSW E 默认值 0
-影子寄存器 被中断处理代码使用
-TOC启用位 1
-============= ===================
-
-----------------------------------------------------------
-
-PA-RISC架构定义了7个寄存器作为“影子寄存器”。这些寄存器在
-RETURN FROM INTERRUPTION AND RESTORE指令中使用，通过消
-除中断处理程序中对一般寄存器（GR）的保存和恢复的需要来减
-少状态保存和恢复时间。影子寄存器是GRs 1, 8, 9, 16, 17,
-24和25。
-
--------------------------------------------------------------------------
-
-寄存器使用说明，最初由John Marvin提供，并由Randolph Chung提供一些补充说明。
-
-对于通用寄存器:
-
-r1,r2,r19-r26,r28,r29 & r31可以在不保存它们的情况下被使用。当然，如果你
-关心它们，在调用另一个程序之前，你也需要保存它们。上面的一些寄存器确实
-有特殊的含义，你应该注意一下:
-
- r1:
- addil指令是硬性规定将其结果放在r1中，所以如果你使用这条指令要
- 注意这点。
-
- r2:
- 这就是返回指针。一般来说，你不想使用它，因为你需要这个指针来返
- 回给你的调用者。然而，它与这组寄存器组合在一起，因为调用者不能
- 依赖你返回时的值是相同的，也就是说，你可以将r2复制到另一个寄存
- 器，并在作废r2后通过该寄存器返回，这应该不会给调用程序带来问题。
-
- r19-r22:
- 这些通常被认为是临时寄存器。
- 请注意，在64位中它们是arg7-arg4。
-
- r23-r26:
- 这些是arg3-arg0，也就是说，如果你不再关心传入的值，你可以使用
- 它们。
-
- r28,r29:
- 这俩是ret0和ret1。它们是你传入返回值的地方。r28是主返回值。当返回
- 小结构体时，r29也可以用来将数据传回给调用程序。
-
- r30:
- 栈指针
-
- r31:
- ble指令将返回指针放在这里。
-
-
- r3-r18,r27,r30需要被保存和恢复。r3-r18只是一般用途的寄存器。
- r27是数据指针，用来使对全局变量的引用更容易。r30是栈指针。
Q: http://patchwork.kernel.org/project/linux-parisc/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jejb/parisc-2.6.git
T: git git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
-F: Documentation/parisc/
+F: Documentation/arch/parisc/
F: arch/parisc/
F: drivers/char/agp/parisc-agp.c
F: drivers/input/misc/hp_sdc_rtc.c
projects / linux-2.6-microblaze.git / commitdiff