drm/amd/display: get socBB from VBIOS for dcn302 and dcn303
authorAurabindo Pillai <aurabindo.pillai@amd.com>
Wed, 21 Apr 2021 19:05:11 +0000 (15:05 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 21 Jun 2021 21:45:14 +0000 (17:45 -0400)
[why]
Some SOC BB paramters may vary per SKU, and it does
not make sense for driver to hardcode these values.
This change was added for dcn30 and dcn301, but not
for dcn302 and dcn303

[how]
Parse the values from VBIOS if available, and use
them if valid

Fixes: 93669c8e480dca ("drm/amd/display: get socBB from VBIOS")
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Bindu Ramamurthy <bindu.r@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dcn302/dcn302_resource.c
drivers/gpu/drm/amd/display/dc/dcn303/dcn303_resource.c

index 628b227..16a75ba 100644 (file)
@@ -1102,6 +1102,26 @@ static bool init_soc_bounding_box(struct dc *dc,  struct resource_pool *pool)
        loaded_ip->max_num_dpp = pool->pipe_count;
        loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk;
        dcn20_patch_bounding_box(dc, loaded_bb);
+
+       if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {
+               struct bp_soc_bb_info bb_info = { 0 };
+
+               if (dc->ctx->dc_bios->funcs->get_soc_bb_info(
+                           dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {
+                       if (bb_info.dram_clock_change_latency_100ns > 0)
+                               dcn3_02_soc.dram_clock_change_latency_us =
+                                       bb_info.dram_clock_change_latency_100ns * 10;
+
+                       if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
+                               dcn3_02_soc.sr_enter_plus_exit_time_us =
+                                       bb_info.dram_sr_enter_exit_latency_100ns * 10;
+
+                       if (bb_info.dram_sr_exit_latency_100ns > 0)
+                               dcn3_02_soc.sr_exit_time_us =
+                                       bb_info.dram_sr_exit_latency_100ns * 10;
+               }
+       }
+
        return true;
 }
 
index 88b609c..34b8946 100644 (file)
@@ -1028,6 +1028,26 @@ static bool init_soc_bounding_box(struct dc *dc,  struct resource_pool *pool)
        loaded_ip->max_num_dpp = pool->pipe_count;
        loaded_ip->clamp_min_dcfclk = dc->config.clamp_min_dcfclk;
        dcn20_patch_bounding_box(dc, loaded_bb);
+
+       if (dc->ctx->dc_bios->funcs->get_soc_bb_info) {
+               struct bp_soc_bb_info bb_info = { 0 };
+
+               if (dc->ctx->dc_bios->funcs->get_soc_bb_info(
+                           dc->ctx->dc_bios, &bb_info) == BP_RESULT_OK) {
+                       if (bb_info.dram_clock_change_latency_100ns > 0)
+                               dcn3_03_soc.dram_clock_change_latency_us =
+                                       bb_info.dram_clock_change_latency_100ns * 10;
+
+                       if (bb_info.dram_sr_enter_exit_latency_100ns > 0)
+                               dcn3_03_soc.sr_enter_plus_exit_time_us =
+                                       bb_info.dram_sr_enter_exit_latency_100ns * 10;
+
+                       if (bb_info.dram_sr_exit_latency_100ns > 0)
+                               dcn3_03_soc.sr_exit_time_us =
+                                       bb_info.dram_sr_exit_latency_100ns * 10;
+               }
+       }
+
        return true;
 }