Merge tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux

Pull MIPS updates from Thomas Bogendoerfer:

 - added support for Huawei B593u-12

 - added support for virt board aligned to QEMU MIPS virt board

 - added support for doing DMA coherence on a per device base

 - reworked handling of RALINK SoCs

 - cleanup for Loongon64 barriers

 - removed deprecated support for MIPS_CMP SMP handling method

 - removed support Sibyte CARMEL and CHRINE boards

 - cleanups and fixes

* tag 'mips_6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (59 commits)
  MIPS: uprobes: Restore thread.trap_nr
  MIPS: Don't clear _PAGE_SPECIAL in _PAGE_CHG_MASK
  MIPS: Sink body of check_bugs_early() into its only call site
  MIPS: Mark check_bugs() as __init
  Revert "MIPS: generic: Enable all CPUs supported by virt board in Kconfig"
  MIPS: octeon_switch: Remove duplicated labels
  MIPS: loongson2ef: Add missing break in cs5536_isa
  MIPS: Remove set_swbp() in uprobes.c
  MIPS: Use def_bool y for ARCH_SUPPORTS_UPROBES
  MIPS: fw: Allow firmware to pass a empty env
  MIPS: Remove deprecated CONFIG_MIPS_CMP
  MIPS: lantiq: remove unused function declaration
  MIPS: Drop unused positional parameter in local_irq_{dis,en}able
  MIPS: mm: Remove local_cache_flush_page
  MIPS: Remove no longer used ide.h
  MIPS: mm: Remove unused *cache_page_indexed flush functions
  MIPS: generic: Enable all CPUs supported by virt board in Kconfig
  MIPS: Add board config for virt board
  MIPS: Octeon: Disable CVMSEG by default on other platforms
  MIPS: Loongson: Don't select platform features with CPU
  ...

diff --combined Documentation/devicetree/bindings/vendor-prefixes.yaml
index 72c0f5d,06d8c32..82d39ab
--- 1/Documentation/devicetree/bindings/vendor-prefixes.yaml
--- 2/Documentation/devicetree/bindings/vendor-prefixes.yaml
+++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml
@@@ -37,8 -37,6 +37,8 @@@ patternProperties
      description: Abracon Corporation
    "^abt,.*":
      description: ShenZhen Asia Better Technology Ltd.
 +  "^acbel,.*":
 +    description: Acbel Polytech Inc.
    "^acer,.*":
      description: Acer Inc.
    "^acme,.*":
@@@ -242,8 -240,6 +242,8 @@@
      description: CellWise Microelectronics Co., Ltd
    "^ceva,.*":
      description: Ceva, Inc.
 +  "^chargebyte,.*":
 +    description: chargebyte GmbH
    "^checkpoint,.*":
      description: Check Point Software Technologies Ltd.
    "^chefree,.*":
@@@ -520,8 -516,6 +520,8 @@@
      description: GlobalTop Technology, Inc.
    "^gmt,.*":
      description: Global Mixed-mode Technology, Inc.
 +  "^goldelico,.*":
 +    description: Golden Delicious Computers GmbH & Co. KG
    "^goodix,.*":
      description: Shenzhen Huiding Technology Co., Ltd.
    "^google,.*":
@@@ -727,8 -721,6 +727,8 @@@
      description: Lantiq Semiconductor
    "^lattice,.*":
      description: Lattice Semiconductor
 +  "^lctech,.*":
 +    description: Shenzen LC Technology Co., Ltd.
    "^leadtek,.*":
      description: Shenzhen Leadtek Technology Co., Ltd.
    "^leez,.*":
@@@ -777,6 -769,8 +777,8 @@@
      description: Lontium Semiconductor Corporation
    "^loongson,.*":
      description: Loongson Technology Corporation Limited
+   "^loongmasses,.*":
+     description: Nanjing Loongmasses Ltd.
    "^lsi,.*":
      description: LSI Corp. (LSI Logic)
    "^lwn,.*":
@@@ -941,8 -935,6 +943,8 @@@
      description: Nokia
    "^nordic,.*":
      description: Nordic Semiconductor
 +  "^novatek,.*":
 +    description: Novatek
    "^novtech,.*":
      description: NovTech, Inc.
    "^nutsboard,.*":
@@@ -987,8 -979,6 +989,8 @@@
      description: OpenCores.org
    "^openembed,.*":
      description: OpenEmbed
 +  "^openpandora,.*":
 +    description: OpenPandora GmbH
    "^openrisc,.*":
      description: OpenRISC.io
    "^option,.*":
@@@ -1255,8 -1245,6 +1257,8 @@@
      description: Solomon Systech Limited
    "^sony,.*":
      description: Sony Corporation
 +  "^sourceparts,.*":
 +    description: Source Parts Inc.
    "^spansion,.*":
      description: Spansion Inc.
    "^sparkfun,.*":
@@@ -1542,8 -1530,6 +1544,8 @@@
      description: Yes Optoelectronics Co.,Ltd.
    "^yic,.*":
      description: YIC System Co., Ltd.
 +  "^yiming,.*":
 +    description: Henan Yiming Technology Co., Ltd.
    "^ylm,.*":
      description: Shenzhen Yangliming Electronic Technology Co., Ltd.
    "^yna,.*":

diff --combined arch/mips/Kconfig
index 916af9c,7629e67..cd692ac
--- 1/arch/mips/Kconfig
--- 2/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@@ -16,7 -16,6 +16,6 @@@ config MIP
        select ARCH_HAS_UBSAN_SANITIZE_ALL
        select ARCH_HAS_GCOV_PROFILE_ALL
        select ARCH_KEEP_MEMBLOCK
-       select ARCH_SUPPORTS_UPROBES
        select ARCH_USE_BUILTIN_BSWAP
        select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
        select ARCH_USE_MEMTEST
@@@ -47,7 -46,6 +46,7 @@@
        select GENERIC_SMP_IDLE_THREAD
        select GENERIC_TIME_VSYSCALL
        select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
 +      select HAS_IOPORT if !NO_IOPORT_MAP || ISA
        select HAVE_ARCH_COMPILER_H
        select HAVE_ARCH_JUMP_LABEL
        select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
@@@ -64,7 -62,10 +63,7 @@@
        select HAVE_DEBUG_STACKOVERFLOW
        select HAVE_DMA_CONTIGUOUS
        select HAVE_DYNAMIC_FTRACE
 -      select HAVE_EBPF_JIT if !CPU_MICROMIPS && \
 -                              !CPU_DADDI_WORKAROUNDS && \
 -                              !CPU_R4000_WORKAROUNDS && \
 -                              !CPU_R4400_WORKAROUNDS
 +      select HAVE_EBPF_JIT if !CPU_MICROMIPS
        select HAVE_EXIT_THREAD
        select HAVE_FAST_GUP
        select HAVE_FTRACE_MCOUNT_RECORD
@@@ -113,7 -114,6 +112,6 @@@ config MACH_INGENI
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_SUPPORTS_ZBOOT
        select DMA_NONCOHERENT
-       select ARCH_HAS_SYNC_DMA_FOR_CPU
        select IRQ_MIPS_CPU
        select PINCTRL
        select GPIOLIB
@@@ -132,7 -132,6 +130,6 @@@ choic
  
  config MIPS_GENERIC_KERNEL
        bool "Generic board-agnostic MIPS kernel"
-       select ARCH_HAS_SETUP_DMA_OPS
        select MIPS_GENERIC
        select BOOT_RAW
        select BUILTIN_DTB
@@@ -488,7 -487,6 +485,6 @@@ config MACH_LOONGSON6
        select BOARD_SCACHE
        select CSRC_R4K
        select CEVT_R4K
-       select CPU_HAS_WB
        select FORCE_PCI
        select ISA
        select I8259
@@@ -565,7 -563,6 +561,6 @@@ config MIPS_MALT
        select SYS_SUPPORTS_LITTLE_ENDIAN
        select SYS_SUPPORTS_MICROMIPS
        select SYS_SUPPORTS_MIPS16
-       select SYS_SUPPORTS_MIPS_CMP
        select SYS_SUPPORTS_MIPS_CPS
        select SYS_SUPPORTS_MULTITHREADING
        select SYS_SUPPORTS_RELOCATABLE
@@@ -793,24 -790,6 +788,6 @@@ config SGI_IP3
        help
          If you want this kernel to run on SGI O2 workstation, say Y here.
  
- config SIBYTE_CRHINE
-       bool "Sibyte BCM91120C-CRhine"
-       select BOOT_ELF32
-       select SIBYTE_BCM1120
-       select SWAP_IO_SPACE
-       select SYS_HAS_CPU_SB1
-       select SYS_SUPPORTS_BIG_ENDIAN
-       select SYS_SUPPORTS_LITTLE_ENDIAN
- 
- config SIBYTE_CARMEL
-       bool "Sibyte BCM91120x-Carmel"
-       select BOOT_ELF32
-       select SIBYTE_BCM1120
-       select SWAP_IO_SPACE
-       select SYS_HAS_CPU_SB1
-       select SYS_SUPPORTS_BIG_ENDIAN
-       select SYS_SUPPORTS_LITTLE_ENDIAN
- 
  config SIBYTE_CRHONE
        bool "Sibyte BCM91125C-CRhone"
        select BOOT_ELF32
@@@ -824,7 -803,7 +801,7 @@@
  config SIBYTE_RHONE
        bool "Sibyte BCM91125E-Rhone"
        select BOOT_ELF32
-       select SIBYTE_BCM1125H
+       select SIBYTE_SB1250
        select SWAP_IO_SPACE
        select SYS_HAS_CPU_SB1
        select SYS_SUPPORTS_BIG_ENDIAN
@@@ -1075,7 -1054,7 +1052,7 @@@ config FW_CF
        bool
  
  config ARCH_SUPPORTS_UPROBES
-       bool
+       def_bool y
  
  config DMA_NONCOHERENT
        bool
@@@ -1086,8 -1065,10 +1063,10 @@@
        # by pgprot_writcombine can be mixed, and the latter sometimes provides
        # significant advantages.
        #
+       select ARCH_HAS_SETUP_DMA_OPS
        select ARCH_HAS_DMA_WRITE_COMBINE
        select ARCH_HAS_DMA_PREP_COHERENT
+       select ARCH_HAS_SYNC_DMA_FOR_CPU
        select ARCH_HAS_SYNC_DMA_FOR_DEVICE
        select ARCH_HAS_DMA_SET_UNCACHED
        select DMA_NONCOHERENT_MMAP
@@@ -1181,12 -1162,6 +1160,6 @@@ config SYS_SUPPORTS_LITTLE_ENDIA
  config MIPS_HUGE_TLB_SUPPORT
        def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
  
- config IRQ_MSP_SLP
-       bool
- 
- config IRQ_MSP_CIC
-       bool
- 
  config IRQ_TXX9
        bool
  
@@@ -1364,7 -1339,6 +1337,6 @@@ config CPU_LOONGSON2
        bool "Loongson 2F"
        depends on SYS_HAS_CPU_LOONGSON2F
        select CPU_LOONGSON2EF
-       select GPIOLIB
        help
          The Loongson 2F processor implements the MIPS III instruction set
          with many extensions.
@@@ -1786,7 -1760,6 +1758,6 @@@ config CPU_LOONGSON2E
        select CPU_SUPPORTS_64BIT_KERNEL
        select CPU_SUPPORTS_HIGHMEM
        select CPU_SUPPORTS_HUGEPAGES
-       select ARCH_HAS_PHYS_TO_DMA
  
  config CPU_LOONGSON32
        bool
@@@ -1851,11 -1824,9 +1822,9 @@@ config SYS_HAS_CPU_MIPS32_R3_
  
  config SYS_HAS_CPU_MIPS32_R5
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_MIPS32_R6
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_MIPS64_R1
        bool
@@@ -1865,15 -1836,12 +1834,12 @@@ config SYS_HAS_CPU_MIPS64_R
  
  config SYS_HAS_CPU_MIPS64_R5
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_MIPS64_R6
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_P5600
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_R3000
        bool
@@@ -1898,7 -1866,6 +1864,6 @@@ config SYS_HAS_CPU_NEVAD
  
  config SYS_HAS_CPU_R10000
        bool
-       select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT
  
  config SYS_HAS_CPU_RM7000
        bool
@@@ -1927,7 -1894,6 +1892,6 @@@ config SYS_HAS_CPU_BMIPS438
  config SYS_HAS_CPU_BMIPS5000
        bool
        select SYS_HAS_CPU_BMIPS
-       select ARCH_HAS_SYNC_DMA_FOR_CPU
  
  #
  # CPU may reorder R->R, R->W, W->R, W->W
@@@ -2298,15 -2264,10 +2262,10 @@@ config MIPS_VPE_LOADE
          Includes a loader for loading an elf relocatable object
          onto another VPE and running it.
  
- config MIPS_VPE_LOADER_CMP
-       bool
-       default "y"
-       depends on MIPS_VPE_LOADER && MIPS_CMP
- 
  config MIPS_VPE_LOADER_MT
        bool
        default "y"
-       depends on MIPS_VPE_LOADER && !MIPS_CMP
+       depends on MIPS_VPE_LOADER
  
  config MIPS_VPE_LOADER_TOM
        bool "Load VPE program into memory hidden from linux"
@@@ -2322,31 -2283,10 +2281,10 @@@ config MIPS_VPE_APSP_AP
        bool "Enable support for AP/SP API (RTLX)"
        depends on MIPS_VPE_LOADER
  
- config MIPS_VPE_APSP_API_CMP
-       bool
-       default "y"
-       depends on MIPS_VPE_APSP_API && MIPS_CMP
- 
  config MIPS_VPE_APSP_API_MT
        bool
        default "y"
-       depends on MIPS_VPE_APSP_API && !MIPS_CMP
- 
- config MIPS_CMP
-       bool "MIPS CMP framework support (DEPRECATED)"
-       depends on SYS_SUPPORTS_MIPS_CMP && !CPU_MIPSR6
-       select SMP
-       select SYNC_R4K
-       select SYS_SUPPORTS_SMP
-       select WEAK_ORDERING
-       default n
-       help
-         Select this if you are using a bootloader which implements the "CMP
-         framework" protocol (ie. YAMON) and want your kernel to make use of
-         its ability to start secondary CPUs.
- 
-         Unless you have a specific need, you should use CONFIG_MIPS_CPS
-         instead of this.
+       depends on MIPS_VPE_APSP_API
  
  config MIPS_CPS
        bool "MIPS Coherent Processing System support"
@@@ -2802,9 -2742,6 +2740,6 @@@ config HOTPLUG_CP
  config SMP_UP
        bool
  
- config SYS_SUPPORTS_MIPS_CMP
-       bool
- 
  config SYS_SUPPORTS_MIPS_CPS
        bool
  

diff --combined arch/mips/kernel/vpe.c
index 5c4adc6,343d259..e9a0cfd
--- 1/arch/mips/kernel/vpe.c
--- 2/arch/mips/kernel/vpe.c
+++ b/arch/mips/kernel/vpe.c
@@@ -199,17 -199,18 +199,17 @@@ static void layout_sections(struct modu
        for (m = 0; m < ARRAY_SIZE(masks); ++m) {
                for (i = 0; i < hdr->e_shnum; ++i) {
                        Elf_Shdr *s = &sechdrs[i];
 +                      struct module_memory *mod_mem;
 +
 +                      mod_mem = &mod->mem[MOD_TEXT];
  
                        if ((s->sh_flags & masks[m][0]) != masks[m][0]
                            || (s->sh_flags & masks[m][1])
                            || s->sh_entsize != ~0UL)
                                continue;
                        s->sh_entsize =
 -                              get_offset((unsigned long *)&mod->core_layout.size, s);
 +                              get_offset((unsigned long *)&mod_mem->size, s);
                }
 -
 -              if (m == 0)
 -                      mod->core_layout.text_size = mod->core_layout.size;
 -
        }
  }
  
@@@ -640,7 -641,7 +640,7 @@@ static int vpe_elfload(struct vpe *v
                layout_sections(&mod, hdr, sechdrs, secstrings);
        }
  
 -      v->load_addr = alloc_progmem(mod.core_layout.size);
 +      v->load_addr = alloc_progmem(mod.mem[MOD_TEXT].size);
        if (!v->load_addr)
                return -ENOMEM;
  
@@@ -794,7 -795,7 +794,7 @@@ static int vpe_open(struct inode *inode
  
  static int vpe_release(struct inode *inode, struct file *filp)
  {
- #if defined(CONFIG_MIPS_VPE_LOADER_MT) || defined(CONFIG_MIPS_VPE_LOADER_CMP)
+ #ifdef CONFIG_MIPS_VPE_LOADER_MT
        struct vpe *v;
        Elf_Ehdr *hdr;
        int ret = 0;

diff --combined arch/mips/sibyte/common/sb_tbprof.c
index ac376df,004a084..408db45
--- 1/arch/mips/sibyte/common/sb_tbprof.c
--- 2/arch/mips/sibyte/common/sb_tbprof.c
+++ b/arch/mips/sibyte/common/sb_tbprof.c
@@@ -23,7 -23,7 +23,7 @@@
  #include <asm/io.h>
  #include <asm/sibyte/sb1250.h>
  
- #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+ #ifdef CONFIG_SIBYTE_BCM1x80
  #include <asm/sibyte/bcm1480_regs.h>
  #include <asm/sibyte/bcm1480_scd.h>
  #include <asm/sibyte/bcm1480_int.h>
@@@ -35,7 -35,7 +35,7 @@@
  #error invalid SiByte UART configuration
  #endif
  
- #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+ #ifdef CONFIG_SIBYTE_BCM1x80
  #undef K_INT_TRACE_FREEZE
  #define K_INT_TRACE_FREEZE K_BCM1480_INT_TRACE_FREEZE
  #undef K_INT_PERF_CNT
@@@ -157,7 -157,7 +157,7 @@@ static void arm_tb(void
         * a previous interrupt request.  This means that bus profiling
         * requires ALL of the SCD perf counters.
         */
- #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+ #ifdef CONFIG_SIBYTE_BCM1x80
        __raw_writeq((scdperfcnt & ~M_SPC_CFG_SRC1) |
                                                /* keep counters 0,2,3,4,5,6,7 as is */
                     V_SPC_CFG_SRC1(1),         /* counter 1 counts cycles */
@@@ -290,7 -290,7 +290,7 @@@ static int sbprof_zbprof_start(struct f
         *  pass them through.  I am exploiting my knowledge that
         *  cp0_status masks out IP[5]. krw
         */
- #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+ #ifdef CONFIG_SIBYTE_BCM1x80
        __raw_writeq(K_BCM1480_INT_MAP_I3,
                     IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_MAP_BASE_L) +
                            ((K_BCM1480_INT_PERF_CNT & 0x3f) << 3)));
@@@ -343,7 -343,7 +343,7 @@@
        __raw_writeq(0, IOADDR(A_SCD_TRACE_SEQUENCE_7));
  
        /* Now indicate the PERF_CNT interrupt as a trace-relevant interrupt */
- #if defined(CONFIG_SIBYTE_BCM1x55) || defined(CONFIG_SIBYTE_BCM1x80)
+ #ifdef CONFIG_SIBYTE_BCM1x80
        __raw_writeq(1ULL << (K_BCM1480_INT_PERF_CNT & 0x3f),
                     IOADDR(A_BCM1480_IMR_REGISTER(0, R_BCM1480_IMR_INTERRUPT_TRACE_L)));
  #else
@@@ -550,7 -550,7 +550,7 @@@ static int __init sbprof_tb_init(void
                return -EIO;
        }
  
 -      tbc = class_create(THIS_MODULE, "sb_tracebuffer");
 +      tbc = class_create("sb_tracebuffer");
        if (IS_ERR(tbc)) {
                err = PTR_ERR(tbc);
                goto out_chrdev;